Datasheet Texas Instruments DS92LX2122 — 数据表
| 制造商 | Texas Instruments |
| 系列 | DS92LX2122 |
10-50 MHz DC平衡的Channel Link III双向控制解串器
数据表
DS92LX2121/22 10 - 50 MHz DC-Balanced Ch Link III Bi-Directional Control SER/DES datasheet
PDF, 980 Kb, 修订版: J, 档案已发布: Jan 17, 2014
从文件中提取
价格
状态
| DS92LX2122SQ/NOPB | DS92LX2122SQE/NOPB | DS92LX2122SQX/NOPB | |
|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | Yes | No |
打包
| DS92LX2122SQ/NOPB | DS92LX2122SQE/NOPB | DS92LX2122SQX/NOPB | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 48 | 48 | 48 |
| Package Type | RHS | RHS | RHS |
| Industry STD Term | WQFN | WQFN | WQFN |
| JEDEC Code | S-PQFP-N | S-PQFP-N | S-PQFP-N |
| Package QTY | 1000 | 250 | 2500 |
| Carrier | LARGE T&R | SMALL T&R | LARGE T&R |
| Device Marking | LX2122 | LX2122 | LX2122 |
| Width (mm) | 7 | 7 | 7 |
| Length (mm) | 7 | 7 | 7 |
| Thickness (mm) | .75 | .75 | .75 |
| Pitch (mm) | .5 | .5 | .5 |
| Max Height (mm) | .8 | .8 | .8 |
| Mechanical Data | 下载 | 下载 | 下载 |
参数化
| Parameters / Models | DS92LX2122SQ/NOPB | DS92LX2122SQE/NOPB | DS92LX2122SQX/NOPB |
|---|---|---|---|
| Clock Max, MHz | 50 | 50 | 50 |
| Clock Min, MHz | 10 | 10 | 10 |
| Compression Ratio | 21 to 1 | 21 to 1 | 21 to 1 |
| ESD, kV | 8 | 8 | 8 |
| Function | Deserializer | Deserializer | Deserializer |
| Input Compatibility | CML | CML | CML |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 |
| Output Compatibility | LVCMOS | LVCMOS | LVCMOS |
| Package Group | WQFN | WQFN | WQFN |
| Package Size: mm2:W x L, PKG | 48WQFN: 49 mm2: 7 x 7(WQFN) | 48WQFN: 49 mm2: 7 x 7(WQFN) | 48WQFN: 49 mm2: 7 x 7(WQFN) |
| Parallel Bus Width, bits | 21 | 21 | 21 |
| Protocols | Channel-Link III | Channel-Link III | Channel-Link III |
| Rating | Catalog | Catalog | Catalog |
生态计划
| DS92LX2122SQ/NOPB | DS92LX2122SQE/NOPB | DS92LX2122SQX/NOPB | |
|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant |
应用须知
- DS15BA101 & DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES (Rev. E)PDF, 170 Kb, 修订版: E, 档案已发布: Apr 29, 2013
Reduction in system size, increase in system performance and savings in system cost are valuablebenefits that SER/DES devices (Serializers and Deserializers) bring to many system designers. Thesebenefits are the reason why SER/DES are integral pieces of many of today’s high-speed systems.One of the design constraints for these systems is the maximum transmission distance between a serializer
模型线
系列: DS92LX2122 (3)
制造商分类
- Semiconductors> Interface> Serializer, Deserializer> Channel Link III