Datasheet Texas Instruments DS99R101 — 数据表
制造商 | Texas Instruments |
系列 | DS99R101 |
3-40MHz DC平衡的24位LVDS串行器
数据表
DS99R101/DS99R102 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer datasheet
PDF, 909 Kb, 修订版: D, 档案已发布: Apr 16, 2013
从文件中提取
价格
状态
DS99R101VS/NOPB | DS99R101VSX/NOPB | |
---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | Yes |
打包
DS99R101VS/NOPB | DS99R101VSX/NOPB | |
---|---|---|
N | 1 | 2 |
Pin | 48 | 48 |
Package Type | PFB | PFB |
Industry STD Term | TQFP | TQFP |
JEDEC Code | S-PQFP-G | S-PQFP-G |
Package QTY | 250 | 1000 |
Carrier | JEDEC TRAY (10+1) | LARGE T&R |
Device Marking | DS99R101 | VS |
Width (mm) | 7 | 7 |
Length (mm) | 7 | 7 |
Thickness (mm) | 1 | 1 |
Pitch (mm) | .5 | .5 |
Max Height (mm) | 1.2 | 1.2 |
Mechanical Data | 下载 | 下载 |
参数化
Parameters / Models | DS99R101VS/NOPB | DS99R101VSX/NOPB |
---|---|---|
Approx. Price (US$) | 4.51 | 1ku | |
Color Depth, bpp | 18 | |
Color Depth(bpp) | 18 | |
Diagnostics | - | - |
EMI Reduction | Progressive Turn On (PTO) | Progressive Turn On (PTO) |
Function | Serializer | Serializer |
Input Compatibility | LVCMOS | LVCMOS |
Operating Temperature Range, C | 0 to 70 | |
Operating Temperature Range(C) | 0 to 70 | |
Output Compatibility | FPD-Link LVDS | FPD-Link LVDS |
Package Group | TQFP | TQFP |
Package Size: mm2:W x L, PKG | 48TQFP: 81 mm2: 9 x 9(TQFP) | |
Package Size: mm2:W x L (PKG) | 48TQFP: 81 mm2: 9 x 9(TQFP) | |
Pixel Clock Min, MHz | 3 | |
Pixel Clock Min(MHz) | 3 | |
Pixel Clock(Max), MHz | 40 | |
Pixel Clock(Max)(MHz) | 40 | |
Rating | Catalog | Catalog |
Signal Conditioning | - | - |
Special Features | - | - |
SupplyVoltage(Volt) | 3.3 | |
Total Throughput, Mbps | 960 | |
Total Throughput(Mbps) | 960 |
生态计划
DS99R101VS/NOPB | DS99R101VSX/NOPB | |
---|---|---|
RoHS | Compliant | Compliant |
Pb Free | Yes |
应用须知
- LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)PDF, 101 Kb, 修订版: A, 档案已发布: Apr 29, 2013
This application note introduces Texas Instrument’s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions. - Extending the Reach of a FPD-Link II Interface with Cable Drivers and Equalizers (Rev. A)PDF, 118 Kb, 修订版: A, 档案已发布: Apr 26, 2013
TI's family of embedded clock LVDS SER/DES (FPD-link II) provides a 2-wire serial interface for displayapplications up to distances of 10 meters.
模型线
系列: DS99R101 (2)
制造商分类
- Semiconductors> Interface> Display & Imaging SerDes> FPD-Link II SerDes