Datasheet Texas Instruments DS99R421ISQ/NOPB — 数据表

5-43 MHz FPD-Link LVDS（3数据+ 1 Clk）至FPD-Link II LVDS（嵌入式Clk DC平衡）转换36-WQFN

数据表

PDF, 859 Kb, 修订版: D, 档案已发布: Apr 16, 2013

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Lifecycle Status	NRND (Not recommended for new designs)
Manufacture's Sample Availability	No

RoHS

Compliant

Evaluation Modules & Boards: FPDXSDUR-43USB
FPD- Link LVDS to FPD-Link II Embedded Clock LVDS Converter DS99R421 Evaluation Kit
Lifecycle Status: Active (Recommended for new designs)
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AN-1807 FPD-Link II Display SerDes Overview (Rev. B)
PDF, 45 Kb, 修订版: B, 档案已发布: Apr 26, 2013
TIвЂ™s FPD-Link II family of embedded clock LVDS SerDes provide enhanced features, and improved signal quality over prior generations of FPD-Link SerDes devices for Display applications. FPD-Link Chipsets serialized the wide parallel RGB buses down to 4 or 5 pairs of LVDS signaling depending upon the chipset. 18-bit RGB was serialized to three LVDS data lines and a LVDS clock, while 24-bit RGB was s
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LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)
PDF, 101 Kb, 修订版: A, 档案已发布: Apr 29, 2013
This application note introduces Texas InstrumentвЂ™s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions.
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Extending the Reach of a FPD-Link II Interface with Cable Drivers and Equalizers (Rev. A)
PDF, 118 Kb, 修订版: A, 档案已发布: Apr 26, 2013
TI's family of embedded clock LVDS SER/DES (FPD-link II) provides a 2-wire serial interface for displayapplications up to distances of 10 meters.

系列: DS99R421 (2)