Datasheet Texas Instruments LM5025D — 数据表

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Design LM5025D
SNVSAB0 – JUNE 2015 LM5025D Active Clamp Voltage Mode PWM Controller
1 Features 3 Description The LM5025D is a functional variant of the LM5025
active clamp PWM controller. The functional
differences of the LM5025D are: The CS1 and CS2 absolute maximum ratings
have been increased to 7 V. The CS1 and CS2 current limit thresholds have
been increased to 0.5 V. The internal CS2 filter discharge device has been
disabled and no longer operates each clock cycle. The internal VCC and VREF regulators continue to
operate when the line UVLO pin is below
threshold. 1 Internal Start-Up Bias Regulator
3-A Compound Main Gate Driver
Programmable Line Under-Voltage Lockout
(UVLO) with Adjustable Hysteresis
Voltage Mode Control with Feed-Forward
Adjustable Dual Mode Over-Current Protection
Programmable Overlap or Deadtime Between the
Main and Active Clamp Outputs …