Datasheet Texas Instruments LMK04616ZCRR — 数据表
| 制造商 | Texas Instruments |
| 系列 | LMK04616 |
| 零件号 | LMK04616ZCRR |
符合JESD204B标准的超低噪声和低功耗时钟抖动清除器144-NFBGA -40至85
数据表
LMK04616 Ultra-Low Noise and Low Power JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs datasheet
PDF, 1.8 Mb, 修订版: A, 档案已发布: Jun 22, 2017
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价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
打包
| Pin | 144 |
| Package Type | ZCR |
| Industry STD Term | NFBGA |
| JEDEC Code | S-PBGA-N |
| Package QTY | 1000 |
| Carrier | LARGE T&R |
| Device Marking | LMK04616 |
| Width (mm) | 10 |
| Length (mm) | 10 |
| Thickness (mm) | .95 |
| Pitch (mm) | .8 |
| Max Height (mm) | 1.5 |
| Mechanical Data | 下载 |
参数化
| Number of Inputs | 4 |
| Number of Outputs | 16 |
| Operating Temperature Range | -40 to 85 C |
| Output Frequency(Max) | 2000 MHz |
| Output Frequency(Min) | 0.03 MHz |
| Output Level | HCSL,HSDS,LVDS,LVPECL |
| Package Group | NFBGA |
| Package Size: mm2:W x L | 144NFBGA: 100 mm2: 10 x 10(NFBGA) PKG |
| RMS Jitter | 0.065 |
| Rating | Catalog |
| Special Features | 105C PCB temp,Holdover mode,JESD204B SYSREF Generation,Manual and automatic switching between inputs,SPI |
| Supply Voltage(Max) | 3.465 V |
| Supply Voltage(Min) | 1.7 V |
| VCO Frequency(Max) | 6200 MHz |
| VCO Frequency(Min) | 5800 MHz |
生态计划
| RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: LMK04616EVM
LMK04616 Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
应用须知
- SDPLL for LMK046xx FamilyPDF, 4.2 Mb, 档案已发布: May 15, 2017
PLLsusedin the LMK046xxfamilyof devicesare basedon Semi-digitalPLL architecture.LMK04610andLMK04616deviceshavetwo fullyintegratedPLLs.The first PLL,calledPLL1here,usesan externalVCXOas its voltage-controlledoscillator.It is a verylow-bandwidthPLL and the loopbandwidthis <300Hz. Sucha low bandwidthhelpsthe jitter cleaningfor a dirt - LMK0461x Phase Noise Performance With DC-DC Converters (Rev. B)PDF, 2.6 Mb, 修订版: B, 档案已发布: Jul 20, 2017
The LMK0461xdevicefamilyis the industry’s highestperformancewith lowestpowerjittercleanerfamilywith dualPLLscalledPLL1and PLL2.PLL1is a verylow bandwidthPLL that usesan externalVCXOasvoltagecontroloscillator.PLL2is a high bandwidthPLL with an integratedhigh performanceLC oscillator.LMK04610provides10 differentialoutputsand the L - Clocking for Medical Ultrasound SystemsPDF, 1.8 Mb, 档案已发布: Sep 20, 2017
模型线
系列: LMK04616 (2)
- LMK04616ZCRR LMK04616ZCRT
制造商分类
- Semiconductors > Clock and Timing > Clock Jitter Cleaners > Dual / Cascaded PLL