Datasheet Texas Instruments LP2996-N — 数据表
制造商 | Texas Instruments |
系列 | LP2996-N |
具有关断引脚的1.5A DDR终端调节器
数据表
LP2996-N, LP2996A DDR Termination Regulator datasheet
PDF, 1.7 Mb, 修订版: K, 档案已发布: Dec 23, 2016
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价格
状态
LP2996LQ/NOPB | LP2996LQX/NOPB | LP2996M | LP2996M/NOPB | LP2996MR | LP2996MR/NOPB | LP2996MRX | LP2996MRX/NOPB | LP2996MX/NOPB | |
---|---|---|---|---|---|---|---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | NRND (Not recommended for new designs) | Active (Recommended for new designs) | NRND (Not recommended for new designs) | Active (Recommended for new designs) | NRND (Not recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | Yes | Yes | No | No | No | Yes | Yes | Yes |
打包
LP2996LQ/NOPB | LP2996LQX/NOPB | LP2996M | LP2996M/NOPB | LP2996MR | LP2996MR/NOPB | LP2996MRX | LP2996MRX/NOPB | LP2996MX/NOPB | |
---|---|---|---|---|---|---|---|---|---|
N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 |
Pin | 16 | 16 | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
Package Type | NHP | NHP | D | D | DDA | DDA | DDA | DDA | D |
Industry STD Term | WQFN | WQFN | SOIC | SOIC | HSOIC | HSOIC | HSOIC | HSOIC | SOIC |
JEDEC Code | S-PQSO-N | S-PQSO-N | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
Package QTY | 1000 | 4500 | 95 | 95 | 95 | 95 | 2500 | 2500 | 2500 |
Carrier | SMALL T&R | LARGE T&R | TUBE | TUBE | TUBE | TUBE | LARGE T&R | LARGE T&R | LARGE T&R |
Device Marking | L00006B | L00006B | 2996M | 2996M | LP2996 | LP2996 | LP2996 | LP2996 | 2996M |
Width (mm) | 4 | 4 | 3.91 | 3.91 | 3.9 | 3.9 | 3.9 | 3.9 | 3.91 |
Length (mm) | 4 | 4 | 4.9 | 4.9 | 4.89 | 4.89 | 4.89 | 4.89 | 4.9 |
Thickness (mm) | .8 | .8 | 1.58 | 1.58 | 1.48 | 1.48 | 1.48 | 1.48 | 1.58 |
Pitch (mm) | .5 | .5 | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 |
Max Height (mm) | .8 | .8 | 1.75 | 1.75 | 1.7 | 1.7 | 1.7 | 1.7 | 1.75 |
Mechanical Data | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 |
参数化
Parameters / Models | LP2996LQ/NOPB | LP2996LQX/NOPB | LP2996M | LP2996M/NOPB | LP2996MR | LP2996MR/NOPB | LP2996MRX | LP2996MRX/NOPB | LP2996MX/NOPB |
---|---|---|---|---|---|---|---|---|---|
Control Mode | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A |
DDR Memory Type | DDR,DDR2 | DDR,DDR2 | DDR,DDR2 | DDR,DDR2 | DDR,DDR2 | DDR,DDR2 | DDR,DDR2 | DDR,DDR2 | DDR,DDR2 |
Iout VTT(Max), A | 1.5 | 1.5 | 1.5 | 1.5 | 1.5 | 1.5 | 1.5 | 1.5 | 1.5 |
Iq(Typ), mA | 0.32 | 0.32 | 0.32 | 0.32 | 0.32 | 0.32 | 0.32 | 0.32 | 0.32 |
Operating Temperature Range, C | 0 to 125 | 0 to 125 | 0 to 125 | 0 to 125 | 0 to 125 | 0 to 125 | 0 to 125 | 0 to 125 | 0 to 125 |
Output | VREF,VTT | VREF,VTT | VREF,VTT | VREF,VTT | VREF,VTT | VREF,VTT | VREF,VTT | VREF,VTT | VREF,VTT |
Package Group | WQFN | WQFN | SOIC | SOIC | SO PowerPAD | SO PowerPAD | SO PowerPAD | SO PowerPAD | SOIC |
Package Size: mm2:W x L, PKG | 16WQFN: 16 mm2: 4 x 4(WQFN) | 16WQFN: 16 mm2: 4 x 4(WQFN) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8SO PowerPAD: 29 mm2: 6 x 4.9(SO PowerPAD) | 8SO PowerPAD: 29 mm2: 6 x 4.9(SO PowerPAD) | 8SO PowerPAD: 29 mm2: 6 x 4.9(SO PowerPAD) | 8SO PowerPAD: 29 mm2: 6 x 4.9(SO PowerPAD) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) |
Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
Regulator Type | Linear Regulator | Linear Regulator | Linear Regulator | Linear Regulator | Linear Regulator | Linear Regulator | Linear Regulator | Linear Regulator | Linear Regulator |
Special Features | Shutdown Pin for S3 | Shutdown Pin for S3 | Shutdown Pin for S3 | Shutdown Pin for S3 | Shutdown Pin for S3 | Shutdown Pin for S3 | Shutdown Pin for S3 | Shutdown Pin for S3 | Shutdown Pin for S3 |
Vin Bias(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
Vin Bias(Min), V | 2.2 | 2.2 | 2.2 | 2.2 | 2.2 | 2.2 | 2.2 | 2.2 | 2.2 |
Vin(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
Vin(Min), V | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 |
Vout VTT(Min), V | 0.9 | 0.9 | 0.9 | 0.9 | 0.9 | 0.9 | 0.9 | 0.9 | 0.9 |
生态计划
LP2996LQ/NOPB | LP2996LQX/NOPB | LP2996M | LP2996M/NOPB | LP2996MR | LP2996MR/NOPB | LP2996MRX | LP2996MRX/NOPB | LP2996MX/NOPB | |
---|---|---|---|---|---|---|---|---|---|
RoHS | Compliant | Compliant | See ti.com | Compliant | See ti.com | Compliant | See ti.com | Compliant | Compliant |
应用须知
- Limiting DDR Termination Regulators’ Inrush CurrentPDF, 772 Kb, 档案已发布: Aug 23, 2016
The output voltage of DDR termination regulators tends to rise quickly after their VDDQ line is enabled. Most DDR terminators are specifically designed for fast start-up. They also require bulky output capacitors for a stable output voltage. This often results in a significant inrush current from DDR terminator voltage supply to charge the output capacitors and to provide curre
模型线
系列: LP2996-N (9)
制造商分类
- Semiconductors> Power Management> DDR Memory Power Solutions