Datasheet Texas Instruments OMAP3503ECUSA — 数据表
制造商 | Texas Instruments |
系列 | OMAP3503 |
零件号 | OMAP3503ECUSA |
Sitara处理器:ARM Cortex-A8,LPDDR 423-FCBGA -40至105
数据表
价格
状态
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | Yes |
打包
Pin | 423 | 423 |
Package Type | CUS | CUS |
Industry STD Term | FC/CSP | FC/CSP |
JEDEC Code | S-PBGA-N | S-PBGA-N |
Package QTY | 90 | 90 |
Carrier | JEDEC TRAY (5+1) | JEDEC TRAY (5+1) |
Device Marking | A | 3503ECUS |
Width (mm) | 16 | 16 |
Length (mm) | 16 | 16 |
Thickness (mm) | .96 | .96 |
Pitch (mm) | .65 | .65 |
Max Height (mm) | 1.4 | 1.4 |
Mechanical Data | 下载 | 下载 |
参数化
ARM CPU | 1 ARM Cortex-A8 |
ARM MHz | 720 Max. |
Applications | Communications Equipment,Enterprise Systems,Industrial,Personal Electronics |
DRAM | LPDDR |
Display Options | LCD,rotation/resizing,multidisplay |
I2C | 3 |
On-Chip L2 Cache | 256 KB (ARM Cortex-A8) |
Operating Systems | Integrity,Linux,Neutrino,Tornado,VxWorks,Windows Embedded CE |
Operating Temperature Range | -40 to 105,0 to 90 C |
Other On-Chip Memory | 64 KB |
Rating | Catalog |
SPI | 4 |
UART | 3 SCI |
USB | 2 |
Video Port | 1 Input,1 Output Configurable |
生态计划
RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: TMDSEVM3530
OMAP35x Evaluation Module (EVM)
Lifecycle Status: Active (Recommended for new designs) - JTAG Emulators/ Analyzers: TMDSEMU200-U
XDS200 USB Debug Probe
Lifecycle Status: Active (Recommended for new designs) - JTAG Emulators/ Analyzers: TMDSEMU560V2STM-UE
XDS560v2 System Trace USB & Ethernet Debug Probe
Lifecycle Status: Active (Recommended for new designs) - JTAG Emulators/ Analyzers: TMDSEMU560V2STM-U
XDS560v2 System Trace USB Debug Probe
Lifecycle Status: Active (Recommended for new designs)
应用须知
- Demystify DSI I/FPDF, 1.8 Mb, 档案已发布: Nov 30, 2012
- OMAP3530/25/15/03 CBB CBC & CUS Reflow ProfilesPDF, 27 Kb, 档案已发布: Nov 13, 2009
This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute visit this topic at:http://wiki.davincidsp.com/index.php/OMAP3_CBB_CBC_CUS_Reflow_Profiles
Reflow profiles are dependent on numerous factors including package type number of components bo
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It is easy to see from the unique look that the OMAP35x parts have a very unusual footprint. The OMAP35x ball grid array is designed with new technology called the Via Channel array which makes significant printed circuit board (PCB) cost savings possible. If the PCB is routed correctly this cost savings can be substantial. This application report explains how this is possible and shows several - Powering OMAP3 With TPS65023: Design-In Guide (Rev. B)PDF, 181 Kb, 修订版: B, 档案已发布: Mar 2, 2009
- OMAP35x to AM35x Hardware Migration GuidePDF, 19 Kb, 档案已发布: May 24, 2010
This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute visit this topic at:http://processors.wiki.ti.com/index.php/OMAP35x_to_AM35x_Hardware_Migration_Guide.
This article describes hardware device considerations to migrate a design
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The OMAP35xx Applications Processors have a diverse set of power management features which potentially enable lower cost power solutions based on your application. This design-in guide describes a power solution based on the TPS6235x device. This guide can be used to evaluate this solution for your design or help you make decisions when designing in this solution. - OMAP35x to AM37x Hardware Migration GuidePDF, 37 Kb, 档案已发布: Jun 3, 2010
This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute visit this topic at:http://processors.wiki.ti.com/index.php/OMAP35x_To_AM37x_Hardware_Migration_Guide.
The OMAP35x to AM37x Hardware Migration Guide describes device consideratio
- PCB Assembly Guidelines for 0.4mm Package-On-Package (PoP) Packages Part II (Rev. A)PDF, 2.4 Mb, 修订版: A, 档案已发布: Nov 1, 2013
Once the bottom circuit board has been designed the assembly guidelines for package-on-package (PoP) versions of the OMAP35xx processor and the memory device must be considered.PoP packages have an enormous number of variables associated with assembly. The following factors have a major effect on the quality and reliability of final assembly: the circuit board design the solder paste char
- PCB Design Guidelines for 0.4mm Package-On-Package (PoP) Packages Part I (Rev. B)PDF, 6.7 Mb, 修订版: B, 档案已发布: Jun 13, 2009
Ball grid array (BGA) packages having 0.4mm ball pitch require careful attention to printed circuit board (PCB) design parameters to successfully yield reliable and robust assemblies; the standard rules of thumb don't apply anymore. In fact the design guidelines for 0.4mm and 0.5mm differ primarily due to issues surrounding shorts or opens between balls under the processor.In addition to the de - PCB Design Guidelines for 0.5mm Package-On-Package Apps Processors Part IPDF, 2.0 Mb, 档案已发布: Jun 23, 2010
Ball grid array (BGA) packages having 0.5mm ball pitch require careful attention to printed circuit board (PCB) design parameters to successfully yield reliable and robust assemblies. PCBs with package-on-package (PoP) technology have additional assembly requirements and options that need to be considered when designing the PCB.Fine-pitch PCB design is a team effort and may require more than
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制造商分类
- Semiconductors > Processors > Sitara Processors > ARM Cortex-A8 > AM3x