Datasheet Texas Instruments OPA832 — 数据表

制造商Texas Instruments
系列OPA832
Datasheet Texas Instruments OPA832

低功耗,单电源,固定增益视频缓冲器放大器

数据表

Low-Power, Single-Supply, Fixed-Gain Video Buffer Amplifier datasheet
PDF, 750 Kb, 修订版: E, 档案已发布: Aug 28, 2008
从文件中提取

价格

状态

OPA832IDOPA832IDBVROPA832IDBVTOPA832IDBVTG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNo

打包

OPA832IDOPA832IDBVROPA832IDBVTOPA832IDBVTG4
N1234
Pin8555
Package TypeDDBVDBVDBV
Industry STD TermSOICSOT-23SOT-23SOT-23
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY753000250250
CarrierTUBELARGE T&RSMALL T&RSMALL T&R
Device Marking832A74A74A74
Width (mm)3.911.61.61.6
Length (mm)4.92.92.92.9
Thickness (mm)1.581.21.21.2
Pitch (mm)1.27.95.95.95
Max Height (mm)1.751.451.451.45
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参数化

Parameters / ModelsOPA832ID
OPA832ID
OPA832IDBVR
OPA832IDBVR
OPA832IDBVT
OPA832IDBVT
OPA832IDBVTG4
OPA832IDBVTG4
2nd Harmonic, dBc64646464
3rd Harmonic, dBc57575757
@ MHz5555
Acl, min spec gain, V/V1111
Additional FeaturesDecompensatedDecompensatedDecompensatedDecompensated
ArchitectureBipolar,Voltage FBBipolar,Voltage FBBipolar,Voltage FBBipolar,Voltage FB
BW @ Acl, MHz80808080
CMRR(Min), dB72727272
CMRR(Typ), dB72727272
GBW(Typ), MHz160160160160
Input Bias Current(Max), pA10000000100000001000000010000000
Iq per channel(Max), mA4.74.74.74.7
Iq per channel(Typ), mA4.254.254.254.25
Number of Channels1111
Offset Drift(Typ), uV/C20202020
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85
Output Current(Typ), mA80808080
Package GroupSOICSOT-23SOT-23SOT-23
Package Size: mm2:W x L, PKG8SOIC: 29 mm2: 6 x 4.9(SOIC)5SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)5SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)5SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)
Rail-to-RailIn to V-,OutIn to V-,OutIn to V-,OutIn to V-,Out
RatingCatalogCatalogCatalogCatalog
Slew Rate(Typ), V/us350350350350
Total Supply Voltage(Max), +5V=5, +/-5V=1011111111
Total Supply Voltage(Min), +5V=5, +/-5V=102.82.82.82.8
Vn at 1kHz(Typ), nV/rtHz9.29.29.29.2
Vn at Flatband(Typ), nV/rtHz9.39.39.39.3
Vos (Offset Voltage @ 25C)(Max), mV7777

生态计划

OPA832IDOPA832IDBVROPA832IDBVTOPA832IDBVTG4
RoHSCompliantCompliantCompliantCompliant

应用须知

  • RLC Filter Design for ADC Interface Applications (Rev. A)
    PDF, 299 Kb, 修订版: A, 档案已发布: May 13, 2015
    As high performance Analog-to-Digital Converters (ADCs) continue to improve in their performance, the last stage interface from the final amplifier into the converter inputs becomes a critical element in the system design if the full converter dynamic range is desired. This application note describes the performance and design equations for a simple passive 2nd-order filter used successfully in AD
  • Measuring Board Parasitics in High-Speed Analog Design
    PDF, 134 Kb, 档案已发布: Jul 7, 2003
    Successful circuit designs using high-speed amplifiers can depend upon understanding and identifying parasitic PCB components. Simulating a design while including PCB parasitics can protect against unpleasant production surprises. This application report discusses an easy method for measuring parasitic components in a prototype or final PC board design by using a standard oscilloscope and low freq
  • Noise Analysis for High Speed Op Amps (Rev. A)
    PDF, 256 Kb, 修订版: A, 档案已发布: Jan 17, 2005
    As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu

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制造商分类

  • Semiconductors> Amplifiers> Operational Amplifiers (Op Amps)> High-Speed Op Amps (>=50MHz)