Datasheet Texas Instruments SCAN921821 — 数据表
制造商 | Texas Instruments |
系列 | SCAN921821 |
具有预增强,IEEE 1149.1(JTAG)和高速BIST的双18位串行器
数据表
SCAN921821 Dual 18-Bit Serializer w/Pre-emph, IEEE 1149.1 JTAG & At-Speed BIST datasheet
PDF, 1.0 Mb, 修订版: C, 档案已发布: Apr 15, 2013
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价格
状态
SCAN921821TSM/NOPB | |
---|---|
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | Yes |
打包
SCAN921821TSM/NOPB | |
---|---|
N | 1 |
Pin | 100 |
Package Type | NZD |
Industry STD Term | NFBGA |
JEDEC Code | S-PBGA-N |
Package QTY | 240 |
Carrier | JEDEC TRAY (10+1) |
Device Marking | TSM |
Width (mm) | 10 |
Length (mm) | 10 |
Thickness (mm) | 1.4 |
Pitch (mm) | .8 |
Max Height (mm) | 1.5 |
Mechanical Data | 下载 |
参数化
Parameters / Models | SCAN921821TSM/NOPB |
---|---|
Operating Temperature Range, C | -40 to 85 |
Package Group | NFBGA |
Package Size: mm2:W x L, PKG | 100NFBGA: 100 mm2: 10 x 10(NFBGA) |
Rating | Catalog |
生态计划
SCAN921821TSM/NOPB | |
---|---|
RoHS | Compliant |
应用须知
- External Serial Interface Reduces Simultaneous Switching Output Noise in FPGAs (Rev. A)PDF, 8.3 Mb, 修订版: A, 档案已发布: Apr 26, 2013
This application report highlights how using external SerDes in conjunction with minimum current driveFPGA I/O can reduce FPGA’s internal noise and reap the benefits of a serial interface across the system.This may allow designers to use low end FPGAs with external SerDes to reduce cost and still have highanalog performance.
模型线
系列: SCAN921821 (1)
制造商分类
- Semiconductors> Interface> Serializer, Deserializer> BLVDS/LVDS SerDes (<100 MHz)