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www.ti.com SN54HC195
4-BIT PARALLEL-ACCESS SHIFT REGISTERS
SCLS124A – DECEMBER 1992 – REVISED NOVEMBER 2007 FEATURES 1 SN54HC195 . J PACKAGE
(TOP VIEW) Synchronous Parallel Load
Positive-Edge-Triggered Clocking
J and K Inputs to First Stage
Complementary Outputs From Last Stage
Package Options: Plastic and Ceramic DIPS
and Ceramic Chip Carriers
Dependable Texas lnstruments Quality and
Reliability CLR
J
K
A
B
C
D
GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC
QA
QB
QC
QD
QD …