Datasheet Texas Instruments SN54HCT373 — 数据表

制造商Texas Instruments
系列SN54HCT373
Datasheet Texas Instruments SN54HCT373

具有三态输出的八路D型透明锁存器

数据表

SN54HCT373, SN74HCT373 datasheet
PDF, 1.3 Mb, 修订版: D, 档案已发布: Aug 13, 2003
从文件中提取

价格

状态

5962-86867012A5962-8686701RAJM38510/65453BRAJM38510/65453BSAM38510/65453BRAM38510/65453BSASN54HCT373JSNJ54HCT373FKSNJ54HCT373JSNJ54HCT373W
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNoNoNoNo

打包

5962-86867012A5962-8686701RAJM38510/65453BRAJM38510/65453BSAM38510/65453BRAM38510/65453BSASN54HCT373JSNJ54HCT373FKSNJ54HCT373JSNJ54HCT373W
N12345678910
Pin20202020202020202020
Package TypeFKJJWJWJFKJW
Industry STD TermLCCCCDIPCDIPCFPCDIPCFPCDIPLCCCCDIPCFP
JEDEC CodeS-CQCC-NR-GDIP-TR-GDIP-TR-GDFP-FR-GDIP-TR-GDFP-FR-GDIP-TS-CQCC-NR-GDIP-TR-GDFP-F
Package QTY1111111111
CarrierTUBETUBETUBETUBETUBETUBETUBETUBETUBETUBE
Width (mm)8.896.926.926.926.926.926.928.896.926.92
Length (mm)8.8924.224.213.0924.213.0924.28.8924.213.09
Thickness (mm)1.834.574.571.844.571.844.571.834.571.84
Pitch (mm)1.272.542.541.272.541.272.541.272.541.27
Max Height (mm)2.035.085.082.455.082.455.082.035.082.45
Mechanical Data下载下载下载下载下载下载下载下载下载下载
Device Marking65453BRA65453BSAJM38510/JM38510/SN54HCT373J373FKSNJ54HCT373JSNJ54HCT373W

参数化

Parameters / Models5962-86867012A
5962-86867012A
5962-8686701RA
5962-8686701RA
JM38510/65453BRA
JM38510/65453BRA
JM38510/65453BSA
JM38510/65453BSA
M38510/65453BRA
M38510/65453BRA
M38510/65453BSA
M38510/65453BSA
SN54HCT373J
SN54HCT373J
SNJ54HCT373FK
SNJ54HCT373FK
SNJ54HCT373J
SNJ54HCT373J
SNJ54HCT373W
SNJ54HCT373W
3-State OutputYesYesYesYesYesYesYesYesYesYes
Bits8888888888
F @ Nom Voltage(Max), Mhz25252525252525252525
ICC @ Nom Voltage(Max), mA0.080.080.080.080.080.080.080.080.080.08
Input TypeTTLTTLTTLTTLTTLTTLTTLTTLTTLTTL
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA6/-66/-66/-66/-66/-66/-66/-66/-66/-66/-6
Output TypeCMOSCMOSCMOSCMOSCMOSCMOSCMOSCMOSCMOSCMOS
Package GroupLCCCCDIPCDIPCFPCDIPCFPCDIPLCCCCDIPCFP
Package Size: mm2:W x L, PKG20LCCC: 79 mm2: 8.89 x 8.89(LCCC)See datasheet (CDIP)See datasheet (CDIP)See datasheet (CFP)See datasheet (CDIP)See datasheet (CFP)See datasheet (CDIP)20LCCC: 79 mm2: 8.89 x 8.89(LCCC)See datasheet (CDIP)See datasheet (CFP)
RatingMilitaryMilitaryMilitaryMilitaryMilitaryMilitaryMilitaryMilitaryMilitaryMilitary
Technology FamilyHCTHCTHCTHCTHCTHCTHCTHCTHCTHCT
VCC(Max), V5.55.55.55.55.55.55.55.55.55.5
VCC(Min), V4.54.54.54.54.54.54.54.54.54.5
tpd @ Nom Voltage(Max), ns40404040404040404040

生态计划

5962-86867012A5962-8686701RAJM38510/65453BRAJM38510/65453BSAM38510/65453BRAM38510/65453BSASN54HCT373JSNJ54HCT373FKSNJ54HCT373JSNJ54HCT373W
RoHSSee ti.comSee ti.comSee ti.comSee ti.comSee ti.comSee ti.comSee ti.comSee ti.comSee ti.comSee ti.com

应用须知

  • SN54/74HCT CMOS Logic Family Applications and Restrictions
    PDF, 102 Kb, 档案已发布: May 1, 1996
    The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal
  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, 修订版: A, 档案已发布: Feb 6, 2015
  • TI IBIS File Creation Validation and Distribution Processes
    PDF, 380 Kb, 档案已发布: Aug 29, 2002
    The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
    PDF, 614 Kb, 修订版: C, 档案已发布: Dec 2, 2015
  • Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
    PDF, 337 Kb, 档案已发布: Jul 8, 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
  • Designing With Logic (Rev. C)
    PDF, 186 Kb, 修订版: C, 档案已发布: Jun 1, 1997
    Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
  • Introduction to Logic
    PDF, 93 Kb, 档案已发布: Apr 30, 2015
  • Implications of Slow or Floating CMOS Inputs (Rev. D)
    PDF, 260 Kb, 修订版: D, 档案已发布: Jun 23, 2016
  • CMOS Power Consumption and CPD Calculation (Rev. B)
    PDF, 89 Kb, 修订版: B, 档案已发布: Jun 1, 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, 档案已发布: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

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制造商分类

  • Semiconductors> Space & High Reliability> Logic Products> Flip-Flop/Latch/Registers