SN65ELT22
www.ti.com. SLLS924 – DECEMBER 2008 5-V Dual TTL-to-Differential PECL Translator
FEATURES 1 1.1-ns (max) Propagation Delay
Operating Range: VCC = 4.2V to 5.7V with
GND = 0 V
< 50-ps (typ) Output-to-Output Skew
Built-In Temperature Compensation
Drop-In Compatible to the MC10ELT22,
MC100ELT22 PIN ASSIGNMENT
D or DGK PACKAGE
(TOP VIEW)
Q0 1 8 VCC Q0 2 7 D0 Q1 3 6 D1 Q1 4 5 GND APPLICATIONS Data and Clock Transmission Over Backplane
Signaling Level Conversion for Clock or Data DESCRIPTION
The SN65ELT22 is a dual TTL-to-differential PECL
translator. It operates on +5-V supply and ground
only. The output is undetermined when the inputs are
left floating. The low output skew makes the device
an ideal solution for clock or data signal translation.
The SN65ELT22 is housed in an industry standard
SOIC-8 package and is also available in an optional
TSSOP-8 package. Table 1. Pin Descriptions
PIN FUNCTION D0, D1 TTL inputs Q0, Q0, Q1, Q1 PECL outputs VCC Positive supply GND Ground ORDERING INFORMATION (1) (1) PART NUMBER PART MARKING PACKAGE LEAD FINISH SN65ELT22D SN65ELT22 SOIC NiPdAu SN65ELT22DGK SN65ELT22 SOIC-TSSOP NiPdAu Leaded device options are not initially available; contact a sales representative for further details 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. …
