Datasheet Texas Instruments SN65LVDM176DRG4 — 数据表

SN65LVDM176
www.ti.com SLLS320D – DECEMBER 1998 – REVISED JULY 2000 HIGH-SPEED DIFFERENTIAL LINE TRANSCEIVER
FEATURES Low-Voltage Differential Driver and Receiver
for Half-Duplex Operation
Designed for Signaling Rates of 400 Mbit/s
ESD Protection Exceeds 15 kV on Bus Pins
Operates From a Single 3.3-V Supply
Low-Voltage Differential Signaling With
Typical Output Voltages of 350 mV and a
50-Ω Load
Valid Output With as Little as 50 mV Input
Voltage Difference
Propagation Delay Times
– Driver: 1.7 ns Typ
– Receiver: 3.7 ns Typ
Power Dissipation at 200 MHz
– Driver: 50 mW Typical
– Receiver: 60 mW Typical
LVTTL Levels Are 5-V Tolerant
Bus Pins Are High Impedance When Disabled
or With VCC Less Than 1.5 V
Open-Circuit Fail-Safe Receiver
Surface-Mount Packaging …