Datasheet Texas Instruments SN65LVDS100DGKRG4 — 数据表
| 制造商 | Texas Instruments |
| 系列 | SN65LVDS100 |
| 零件号 | SN65LVDS100DGKRG4 |
2 Gbps LVDS / LVPECL / CML至LVDS缓冲器/转发器/转换器8-VSSOP -40至85
数据表
SN65LVDx10x Differential Translator/Repeater datasheet
PDF, 1.6 Mb, 修订版: E, 档案已发布: Jul 20, 2015
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
打包
| Pin | 8 |
| Package Type | DGK |
| Industry STD Term | VSSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2500 |
| Carrier | LARGE T&R |
| Device Marking | AZK |
| Width (mm) | 3 |
| Length (mm) | 3 |
| Thickness (mm) | .97 |
| Pitch (mm) | .65 |
| Max Height (mm) | 1.07 |
| Mechanical Data | 下载 |
参数化
| Device Type | Buffer |
| ESD HBM | 5 kV |
| Function | Repeater/Translator |
| ICC(Max) | 30 mA |
| Input Signal | CML,LVDS,LVPECL |
| No. of Rx | 1 |
| No. of Tx | 1 |
| Operating Temperature Range | -40 to 85 C |
| Output Signal | LVDS |
| Package Group | VSSOP |
| Package Size: mm2:W x L | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) PKG |
| Protocols | LVDS |
| Signaling Rate | 2000 Mbps |
生态计划
| RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: SN65LVDS100EVM
SN65LVDS100 Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: SN65CML100EVM
SN65CML100 Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
应用须知
- Signaling Rate vs. Distance for Differential BuffersPDF, 420 Kb, 档案已发布: Jan 26, 2010
- DC-Coupling Between Differential LVPECL, LVDS, HSTL, and CMLPDF, 135 Kb, 档案已发布: Feb 19, 2003
- AC Coupling Between Differential LVPECL, LVDS, HSTL and CML (Rev. C)PDF, 417 Kb, 修订版: C, 档案已发布: Oct 17, 2007
This report provides a quick reference of ac-coupling techniques for interfacing between different logic levels. The four differential signaling levels found in this reportare low-voltage positive-referenced emitter coupled logic (LVPECL), low-voltage differential signals (LVDS), high-speed transceiver logic (HSTL), and current-modelogic (CML). From these four differential signaling levels, 16
模型线
系列: SN65LVDS100 (8)
制造商分类
- Semiconductors > Interface > LVDS/M-LVDS/PECL > Buffers, Drivers/Receivers and Cross-Points