Datasheet Texas Instruments SN65LVDS33 — 数据表

制造商	Texas Instruments
系列	SN65LVDS33

Datasheet Texas Instruments SN65LVDS33

具有-4V至5V共模范围的四路LVDS接收器

数据表

PDF, 982 Kb, 修订版: B, 档案已发布: Nov 4, 2004

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价格

状态

	SN65LVDS33D	SN65LVDS33DG4	SN65LVDS33DR	SN65LVDS33DRG4	SN65LVDS33PW	SN65LVDS33PWG4	SN65LVDS33PWR	SN65LVDS33PWRG4
Lifecycle Status	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)
Manufacture's Sample Availability	Yes	No	No	Yes	No	No	Yes	Yes

打包

	SN65LVDS33D	SN65LVDS33DG4	SN65LVDS33DR	SN65LVDS33DRG4	SN65LVDS33PW	SN65LVDS33PWG4	SN65LVDS33PWR	SN65LVDS33PWRG4
N	1	2	3	4	5	6	7	8
Pin	16	16	16	16	16	16	16	16
Package Type	D	D	D	D	PW	PW	PW	PW
Industry STD Term	SOIC	SOIC	SOIC	SOIC	TSSOP	TSSOP	TSSOP	TSSOP
JEDEC Code	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G
Package QTY	40	40	2500	2500	90	90	2000	2000
Carrier	TUBE	TUBE	LARGE T&R	LARGE T&R	TUBE	TUBE	LARGE T&R	LARGE T&R
Device Marking	LVDS33	LVDS33	LVDS33	LVDS33	LVDS33	LVDS33	LVDS33	LVDS33
Width (mm)	3.91	3.91	3.91	3.91	4.4	4.4	4.4	4.4
Length (mm)	9.9	9.9	9.9	9.9	5	5	5	5
Thickness (mm)	1.58	1.58	1.58	1.58	1	1	1	1
Pitch (mm)	1.27	1.27	1.27	1.27	.65	.65	.65	.65
Max Height (mm)	1.75	1.75	1.75	1.75	1.2	1.2	1.2	1.2
Mechanical Data	下载	下载	下载	下载	下载	下载	下载	下载

参数化

Parameters / Models	SN65LVDS33D	SN65LVDS33DG4	SN65LVDS33DR	SN65LVDS33DRG4	SN65LVDS33PW	SN65LVDS33PWG4	SN65LVDS33PWR	SN65LVDS33PWRG4
Device Type	Receiver	Receiver	Receiver	Receiver	Receiver	Receiver	Receiver	Receiver
ESD HBM, kV	15	15	15	15	15	15	15	15
Function	Receiver	Receiver	Receiver	Receiver	Receiver	Receiver	Receiver	Receiver
ICC(Max), mA	23	23	23	23	23	23	23	23
Input Signal	CMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECL	CMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECL	CMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECL	CMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECL	CMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECL	CMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECL	CMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECL	CMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECL
No. of Rx	4	4	4	4	4	4	4	4
Operating Temperature Range, C	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85
Output Signal	LVTTL	LVTTL	LVTTL	LVTTL	LVTTL	LVTTL	LVTTL	LVTTL
Package Group	SOIC	SOIC	SOIC	SOIC	TSSOP	TSSOP	TSSOP	TSSOP
Package Size: mm2:W x L, PKG	16SOIC: 59 mm2: 6 x 9.9(SOIC)	16SOIC: 59 mm2: 6 x 9.9(SOIC)	16SOIC: 59 mm2: 6 x 9.9(SOIC)	16SOIC: 59 mm2: 6 x 9.9(SOIC)	16TSSOP: 32 mm2: 6.4 x 5(TSSOP)	16TSSOP: 32 mm2: 6.4 x 5(TSSOP)	16TSSOP: 32 mm2: 6.4 x 5(TSSOP)	16TSSOP: 32 mm2: 6.4 x 5(TSSOP)
Protocols	LVDS	LVDS	LVDS	LVDS	LVDS	LVDS	LVDS	LVDS
Signaling Rate, Mbps	400	400	400	400	400	400	400	400

生态计划

	SN65LVDS33D	SN65LVDS33DG4	SN65LVDS33DR	SN65LVDS33DRG4	SN65LVDS33PW	SN65LVDS33PWG4	SN65LVDS33PWR	SN65LVDS33PWRG4
RoHS	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant

模型线

系列: SN65LVDS33 (8)

SN65LVDS33D SN65LVDS33DG4 SN65LVDS33DR SN65LVDS33DRG4 SN65LVDS33PW SN65LVDS33PWG4 SN65LVDS33PWR SN65LVDS33PWRG4

制造商分类

Semiconductors> Interface> LVDS/M-LVDS/ECL/CML> LVDS PHY (<800Mbps)

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