Datasheet Texas Instruments SN65LVDS387 — 数据表

制造商Texas Instruments
系列SN65LVDS387
Datasheet Texas Instruments SN65LVDS387

16通道LVDS驱动器

数据表

SNx5LVDS3xx High-Speed Differential Line Drivers datasheet
PDF, 1.5 Mb, 修订版: G, 档案已发布: Jan 14, 2016
从文件中提取

价格

状态

SN65LVDS387DGGSN65LVDS387DGGG4SN65LVDS387DGGRSN65LVDS387DGGRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYesNoYes

打包

SN65LVDS387DGGSN65LVDS387DGGG4SN65LVDS387DGGRSN65LVDS387DGGRG4
N1234
Pin64646464
Package TypeDGGDGGDGGDGG
Industry STD TermTSSOPTSSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY252520002000
CarrierTUBETUBELARGE T&RLARGE T&R
Device MarkingLVDS387LVDS387LVDS387LVDS387
Width (mm)6.16.16.16.1
Length (mm)17171717
Thickness (mm)1.151.151.151.15
Pitch (mm).5.5.5.5
Max Height (mm)1.21.21.21.2
Mechanical Data下载下载下载下载

参数化

Parameters / ModelsSN65LVDS387DGG
SN65LVDS387DGG
SN65LVDS387DGGG4
SN65LVDS387DGGG4
SN65LVDS387DGGR
SN65LVDS387DGGR
SN65LVDS387DGGRG4
SN65LVDS387DGGRG4
Device TypeDriverDriverDriverDriver
ESD HBM, kV15151515
FunctionDriverDriverDriverDriver
ICC(Max), mA95959595
Input SignalLVTTLLVTTLLVTTLLVTTL
No. of Tx16161616
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85
Output SignalLVDSLVDSLVDSLVDS
Package GroupTSSOPTSSOPTSSOPTSSOP
Package Size: mm2:W x L, PKG64TSSOP: 138 mm2: 8.1 x 17(TSSOP)64TSSOP: 138 mm2: 8.1 x 17(TSSOP)64TSSOP: 138 mm2: 8.1 x 17(TSSOP)64TSSOP: 138 mm2: 8.1 x 17(TSSOP)
ProtocolsLVDSLVDSLVDSLVDS
Signaling Rate, Mbps630630630630

生态计划

SN65LVDS387DGGSN65LVDS387DGGG4SN65LVDS387DGGRSN65LVDS387DGGRG4
RoHSCompliantCompliantCompliantCompliant

应用须知

  • Using Signaling Rate and Transfer Rate (Rev. A)
    PDF, 258 Kb, 修订版: A, 档案已发布: Feb 7, 2005
    This document defines data signaling rate and data transfer rate, and it demonstrates the differences between them. Taking the SN65LVDS386 and SN65LVDS387 16-channellow-voltage differential (LVDS) line drivers and receivers with random parallel data of various bandwidths as an example, this document discusses the components that make up the system timing budget and presents empirical data on cro

模型线

制造商分类

  • Semiconductors> Interface> LVDS/M-LVDS/ECL/CML> LVDS PHY (<800Mbps)