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Documents SN65LVDS386, SN65LVDS388A
SN65LVDS390, SN65LVDT386, SN65LVDT388A, SN65LVDT390, SN75LVDS386
SN75LVDS388A, SN75LVDS390, SN75LVDT386, SN75LVDT388A, SN75LVDT390
SLLS394I – SEPTEMBER 1999 – REVISED DECEMBER 2014 SNx5LVDx3xx High-Speed Differential Line Receivers
1 Features 3 Description This family of 4-, 8-, or 16-differential line receivers
(with optional integrated termination) implements the
electrical characteristics of low-voltage differential
signaling (LVDS). This signaling technique lowers the
output voltage levels of 5-V differential standard
levels (such as EIA/TIA-422B) to reduce the power,
increase the switching speeds, and allow operation
with a 3-V supply rail. 1 Four-('390), Eight-('388A), or Sixteen-('386) Line
Receivers Meet or Exceed the
Requirements of ANSI TIA/EIA-644 Standard
Integrated 110-Ω Line Termination Resistors on
LVDT Products
Designed for Signaling Rates Up to 250 Mbps
SN65 Versions Bus-Terminal ESD Exceeds …
