Datasheet Texas Instruments SN65LVELT23DGK — 数据表
制造商 | Texas Instruments |
系列 | SN65LVELT23 |
零件号 | SN65LVELT23DGK |
3.3V双路差分LVPECL缓冲器至LVTTL转换器8-VSSOP -40至85
数据表
3.3V Dual Differential LVPECL/LVDS Buffer to LVTTL Translator datasheet
PDF, 809 Kb, 修订版: A, 档案已发布: Aug 3, 2009
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价格
状态
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | Yes |
打包
Pin | 8 |
Package Type | DGK |
Industry STD Term | VSSOP |
JEDEC Code | R-PDSO-G |
Package QTY | 80 |
Carrier | TUBE |
Device Marking | SIMI |
Width (mm) | 3 |
Length (mm) | 3 |
Thickness (mm) | .97 |
Pitch (mm) | .65 |
Max Height (mm) | 1.07 |
Mechanical Data | 下载 |
参数化
Device Type | Buffer |
Function | Translator |
ICC(Max) | 27 mA |
Input Signal | LVPECL,LVDS |
No. of Rx | 2 |
No. of Tx | 2 |
Operating Temperature Range | -40 to 85 C |
Output Signal | LVTTL |
Package Group | VSSOP |
Package Size: mm2:W x L | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) PKG |
Protocols | PECL |
Signaling Rate | 600 Mbps |
生态计划
RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: SN65LVELT23EVM
SN65LVELT23 Evaluation Module
Lifecycle Status: Preview (Device has been announced but is not in production. Samples may or may not be available)
模型线
系列: SN65LVELT23 (4)
- SN65LVELT23D SN65LVELT23DGK SN65LVELT23DGKR SN65LVELT23DR
制造商分类
- Semiconductors > Interface > LVDS/M-LVDS/PECL > Buffers, Drivers/Receivers and Cross-Points