Datasheet Texas Instruments SN74ACT3651 — 数据表

制造商Texas Instruments
系列SN74ACT3651

2048 x 36同步FIFO存储器

数据表

2048 X 36 Clocked First-In, First-Out Memory (Rev. D)
PDF, 464 Kb, 修订版: D, 档案已发布: Feb 17, 1999

价格

状态

SN74ACT3651-15PCB
Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

SN74ACT3651-15PCB
N1
Pin120
Package TypePCB
Industry STD TermHLQFP
JEDEC CodeS-PQFP-G
Package QTY90
CarrierJEDEC TRAY (5+1)
Device MarkingACT3651-15
Width (mm)14
Length (mm)14
Thickness (mm)1.4
Pitch (mm).4
Max Height (mm)1.6
Mechanical Data下载

参数化

Parameters / ModelsSN74ACT3651-15PCB
Approx. Price (US$)25.68 | 1ku
Package GroupHLQFP
Package Size: mm2:W x L (PKG)120HLQFP: 256 mm2: 16 x 16(HLQFP)
Schmitt TriggerNo

生态计划

SN74ACT3651-15PCB
RoHSCompliant
Pb FreeYes

应用须知

  • Power-Dissipation Calculations for TI FIFO Products (Rev. A)
    PDF, 106 Kb, 修订版: A, 档案已发布: Mar 1, 1996
    Low power consumption is a major advantage of TI FIFO products. Power calculations are required to meet design requirements for chip temperature and system power. This document assists component and system designers in evaluating power consumption for the ACT and ABT FIFO products. Two examples of power calculations, one for the SN74ACT3632 bi-directional CMOS FIFO and one for the BiCMOS SN74ABT36
  • FIFO Mailbox-Bypass Registers: Using Bypass Registers to Initialize DMA Control (Rev. A)
    PDF, 65 Kb, 修订版: A, 档案已发布: Mar 1, 1996
    The TI 32- and 36-bit FIFOs contain mailbox-bypass registers that transmit priority from one FIFO port to the other, port A to B or port B to A with out storing the data in the FIFO SRAM buffer. This document describes the FIFO mailbox-bypass registers and shows an example of direct memory access (DMA) control of a digital signal processor (DSP). The components described are the SN74ACT3641 and th

模型线

系列: SN74ACT3651 (1)

制造商分类

  • Semiconductors> Logic> Flip-Flop/Latch/Register> FIFO Register