Datasheet Texas Instruments SN74ALVC00-Q1 — 数据表

制造商	Texas Instruments
系列	SN74ALVC00-Q1

数据表

价格

状态

打包

参数化

Parameters / Models	SN74ALVC00IDRQ1	SN74ALVC00IPWRG4Q1	SN74ALVC00IPWRQ1
Approx. Price (US$)	0.12 | 1ku		0.12 | 1ku
Bits		4
Bits(#)	4		4
F @ Nom Voltage(Max), Mhz		100
F @ Nom Voltage(Max)(Mhz)	100		100
ICC @ Nom Voltage(Max), mA		0.01
ICC @ Nom Voltage(Max)(mA)	0.01		0.01
Input Type	TTL		TTL
Operating Temperature Range, C		-40 to 85
Operating Temperature Range(C)	-40 to 85		-40 to 85
Output Drive (IOL/IOH)(Max), mA		24/-24
Output Drive (IOL/IOH)(Max)(mA)	24/-24		24/-24
Output Type	TTL		TTL
Package Group	TSSOP	TSSOP	TSSOP
Package Size: mm2:W x L, PKG		14TSSOP: 32 mm2: 6.4 x 5(TSSOP)
Package Size: mm2:W x L (PKG)	14TSSOP: 32 mm2: 6.4 x 5(TSSOP)		14TSSOP: 32 mm2: 6.4 x 5(TSSOP)
Rating	Automotive	Automotive	Automotive
Schmitt Trigger	No	No	No
Technology Family	ALVC	ALVC	ALVC
VCC(Max), V		3.6
VCC(Max)(V)	3.6		3.6
VCC(Min), V		1.65
VCC(Min)(V)	1.65		1.65
Voltage(Nom), V		1.8,2.5,2.7,3.3
Voltage(Nom)(V)	1.8 2.5 2.7 3.3		1.8 2.5 2.7 3.3
tpd @ Nom Voltage(Max), ns		4.4,2.8,3.2,3
tpd @ Nom Voltage(Max)(ns)	4.4 2.8 3.2 3		4.4 2.8 3.2 3

生态计划

应用须知

• 下载
  TI SN74ALVC16835 Component Specification Analysis for PC100
  PDF, 43 Kb, 档案已发布: Aug 3, 1998
  The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T
• 下载
  Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)
  PDF, 96 Kb, 修订版: A, 档案已发布: May 13, 1998
  Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large
• 下载
  16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
  PDF, 895 Kb, 修订版: B, 档案已发布: May 22, 2002
  TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
• 下载
  Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
  PDF, 154 Kb, 修订版: A, 档案已发布: Sep 8, 1999
  In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families
• 下载
  Understanding Advanced Bus-Interface Products Design Guide
  PDF, 253 Kb, 档案已发布: May 1, 1996

模型线

制造商分类

• Semiconductors> Logic> Gate> NAND Gate