Datasheet Texas Instruments SN74ALVC244 — 数据表

制造商Texas Instruments
系列SN74ALVC244
Datasheet Texas Instruments SN74ALVC244

具有三态输出的八路缓冲器/驱动器

数据表

SN74ALVC244 datasheet
PDF, 1.3 Mb, 修订版: G, 档案已发布: Aug 31, 2004
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价格

状态

SN74ALVC244DGVRSN74ALVC244DGVRG4SN74ALVC244DWSN74ALVC244DWG4SN74ALVC244DWRSN74ALVC244DWRE4SN74ALVC244DWRG4SN74ALVC244NSRSN74ALVC244NSRE4SN74ALVC244PWSN74ALVC244PWE4SN74ALVC244PWRSN74ALVC244PWRE4SN74ALVC244RGYR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNoNoNoNoNoYesNoNo

打包

SN74ALVC244DGVRSN74ALVC244DGVRG4SN74ALVC244DWSN74ALVC244DWG4SN74ALVC244DWRSN74ALVC244DWRE4SN74ALVC244DWRG4SN74ALVC244NSRSN74ALVC244NSRE4SN74ALVC244PWSN74ALVC244PWE4SN74ALVC244PWRSN74ALVC244PWRE4SN74ALVC244RGYR
N1234567891011121314
Pin2020202020202020202020202020
Package TypeDGVDGVDWDWDWDWDWNSNSPWPWPWPWRGY
Industry STD TermTVSOPTVSOPSOICSOICSOICSOICSOICSOPSOPTSSOPTSSOPTSSOPTSSOPVQFN
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PQFP-N
Package QTY200020002525200020002000200020007070200020003000
CarrierLARGE T&RLARGE T&RTUBETUBELARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&RTUBETUBELARGE T&RLARGE T&RLARGE T&R
Device MarkingVA244VA244ALVC244ALVC244ALVC244ALVC244ALVC244ALVC244ALVC244VA244VA244VA244VA244VA244
Width (mm)4.44.47.57.57.57.57.55.35.34.44.44.44.43.5
Length (mm)5512.812.812.812.812.812.612.66.56.56.56.54.5
Thickness (mm)1.051.052.352.352.352.352.351.951.951111.9
Pitch (mm).4.41.271.271.271.271.271.271.27.65.65.65.65.5
Max Height (mm)1.21.22.652.652.652.652.65221.21.21.21.21
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参数化

Parameters / ModelsSN74ALVC244DGVR
SN74ALVC244DGVR
SN74ALVC244DGVRG4
SN74ALVC244DGVRG4
SN74ALVC244DW
SN74ALVC244DW
SN74ALVC244DWG4
SN74ALVC244DWG4
SN74ALVC244DWR
SN74ALVC244DWR
SN74ALVC244DWRE4
SN74ALVC244DWRE4
SN74ALVC244DWRG4
SN74ALVC244DWRG4
SN74ALVC244NSR
SN74ALVC244NSR
SN74ALVC244NSRE4
SN74ALVC244NSRE4
SN74ALVC244PW
SN74ALVC244PW
SN74ALVC244PWE4
SN74ALVC244PWE4
SN74ALVC244PWR
SN74ALVC244PWR
SN74ALVC244PWRE4
SN74ALVC244PWRE4
SN74ALVC244RGYR
SN74ALVC244RGYR
Bits88888888888888
F @ Nom Voltage(Max), Mhz100100100100100100100100100100100100100100
ICC @ Nom Voltage(Max), mA0.0240.0240.0240.0240.0240.0240.0240.0240.0240.0240.0240.0240.0240.024
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA-24/24-24/24-24/24-24/24-24/24-24/24-24/24-24/24-24/24-24/24-24/24-24/24-24/24-24/24
Package GroupTVSOPTVSOPSOICSOICSOICSOICSOICSOSOTSSOPTSSOPTSSOPTSSOPVQFN
Package Size: mm2:W x L, PKG20TVSOP: 32 mm2: 6.4 x 5(TVSOP)20TVSOP: 32 mm2: 6.4 x 5(TVSOP)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SO: 98 mm2: 7.8 x 12.6(SO)20SO: 98 mm2: 7.8 x 12.6(SO)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20VQFN: 16 mm2: 3.5 x 4.5(VQFN)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNoNoNoNoNoNoNo
Technology FamilyALVCALVCALVCALVCALVCALVCALVCALVCALVCALVCALVCALVCALVCALVC
VCC(Max), V3.63.63.63.63.63.63.63.63.63.63.63.63.63.6
VCC(Min), V1.651.651.651.651.651.651.651.651.651.651.651.651.651.65
Voltage(Nom), V1.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.3
tpd @ Nom Voltage(Max), ns4.4,3.1,2.84.4,3.1,2.84.4,3.1,2.84.4,3.1,2.84.4,3.1,2.84.4,3.1,2.84.4,3.1,2.84.4,3.1,2.84.4,3.1,2.84.4,3.1,2.84.4,3.1,2.84.4,3.1,2.84.4,3.1,2.84.4,3.1,2.8

生态计划

SN74ALVC244DGVRSN74ALVC244DGVRG4SN74ALVC244DWSN74ALVC244DWG4SN74ALVC244DWRSN74ALVC244DWRE4SN74ALVC244DWRG4SN74ALVC244NSRSN74ALVC244NSRE4SN74ALVC244PWSN74ALVC244PWE4SN74ALVC244PWRSN74ALVC244PWRE4SN74ALVC244RGYR
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant

应用须知

  • TI SN74ALVC16835 Component Specification Analysis for PC100
    PDF, 43 Kb, 档案已发布: Aug 3, 1998
    The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T
  • Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)
    PDF, 96 Kb, 修订版: A, 档案已发布: May 13, 1998
    Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, 修订版: B, 档案已发布: May 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
    PDF, 154 Kb, 修订版: A, 档案已发布: Sep 8, 1999
    In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families

模型线

制造商分类

  • Semiconductors> Logic> Buffer/Driver/Transceiver> Non-Inverting Buffer/Driver