Datasheet Texas Instruments SN74ALVCH162373 — 数据表

制造商Texas Instruments
系列SN74ALVCH162373
Datasheet Texas Instruments SN74ALVCH162373

具有三态输出的16位透明D类锁存器

数据表

SN74ALVCH162373 datasheet
PDF, 839 Kb, 修订版: A, 档案已发布: Oct 20, 2004
从文件中提取

价格

状态

74ALVCH162373DLG474ALVCH162373GRE474ALVCH162373GRG474ALVCH162373ZQLRSN74ALVCH162373DLSN74ALVCH162373GRSN74ALVCH162373LR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYesNoNoNoNoNo

打包

74ALVCH162373DLG474ALVCH162373GRE474ALVCH162373GRG474ALVCH162373ZQLRSN74ALVCH162373DLSN74ALVCH162373GRSN74ALVCH162373LR
N1234567
Pin48484856484848
Package TypeDLDGGDGGZQLDLDGGDL
Industry STD TermSSOPTSSOPTSSOPBGA MICROSTAR JUNIORSSOPTSSOPSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PBGA-NR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY252000200010002520001000
CarrierTUBELARGE T&RLARGE T&RLARGE T&RTUBELARGE T&RLARGE T&R
Device MarkingALVCH162373ALVCH162373ALVCH162373VH2373ALVCH162373ALVCH162373ALVCH162373
Width (mm)7.496.16.14.57.496.17.49
Length (mm)15.8812.512.5715.8812.515.88
Thickness (mm)2.591.151.15.752.591.152.59
Pitch (mm).635.5.5.65.635.5.635
Max Height (mm)2.791.21.212.791.22.79
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参数化

Parameters / Models74ALVCH162373DLG4
74ALVCH162373DLG4
74ALVCH162373GRE4
74ALVCH162373GRE4
74ALVCH162373GRG4
74ALVCH162373GRG4
74ALVCH162373ZQLR
74ALVCH162373ZQLR
SN74ALVCH162373DL
SN74ALVCH162373DL
SN74ALVCH162373GR
SN74ALVCH162373GR
SN74ALVCH162373LR
SN74ALVCH162373LR
3-State OutputYesYesYesYesYesYesYes
Bits16161616161616
F @ Nom Voltage(Max), Mhz150150150150150150150
ICC @ Nom Voltage(Max), mA0.040.040.040.040.040.040.04
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA12/-1212/-1212/-1212/-1212/-1212/-1212/-12
Package GroupSSOPTSSOPTSSOPBGA MICROSTAR JUNIORSSOPTSSOPSSOP
Package Size: mm2:W x L, PKG48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNo
Technology FamilyALVCALVCALVCALVCALVCALVCALVC
VCC(Max), V3.63.63.63.63.63.63.6
VCC(Min), V1.651.651.651.651.651.651.65
Voltage(Nom), V1.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.3
tpd @ Nom Voltage(Max), ns6.3,5.3,4.5,46.3,5.3,4.5,46.3,5.3,4.5,46.3,5.3,4.5,46.3,5.3,4.5,46.3,5.3,4.5,46.3,5.3,4.5,4

生态计划

74ALVCH162373DLG474ALVCH162373GRE474ALVCH162373GRG474ALVCH162373ZQLRSN74ALVCH162373DLSN74ALVCH162373GRSN74ALVCH162373LR
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliant

应用须知

  • TI SN74ALVC16835 Component Specification Analysis for PC100
    PDF, 43 Kb, 档案已发布: Aug 3, 1998
    The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T
  • Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)
    PDF, 96 Kb, 修订版: A, 档案已发布: May 13, 1998
    Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large
  • Bus-Hold Circuit
    PDF, 418 Kb, 档案已发布: Feb 5, 2001
    When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, 修订版: B, 档案已发布: May 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
    PDF, 105 Kb, 修订版: A, 档案已发布: Aug 1, 1997
    The spectrum of bus-interface devices with damping resistors or balanced/light output drive currently offered by various logic vendors is confusing at best. Inconsistencies in naming conventions and methods used for implementation make it difficult to identify the best solution for a given application. This report attempts to clarify the issue by looking at several vendors? approaches and discussi
  • Understanding Advanced Bus-Interface Products Design Guide
    PDF, 253 Kb, 档案已发布: May 1, 1996
  • Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices
    PDF, 115 Kb, 档案已发布: Dec 1, 1997
    This application report explores the possibilities for migrating to 3.3-V and 2.5-V power supplies and discusses the implications.Customers are successfully using a wide range of low-voltage 3.3-V logic devices. These devices are within Texas Instruments (TI) advanced low-voltage CMOS (ALVC) crossbar technology (CBT) crossbar technology with integrated diode (CBTD) low-voltage crossbar techn
  • Live Insertion
    PDF, 150 Kb, 档案已发布: Oct 1, 1996
    Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha
  • Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
    PDF, 154 Kb, 修订版: A, 档案已发布: Sep 8, 1999
    In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families
  • CMOS Power Consumption and CPD Calculation (Rev. B)
    PDF, 89 Kb, 修订版: B, 档案已发布: Jun 1, 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
  • Input and Output Characteristics of Digital Integrated Circuits
    PDF, 1.7 Mb, 档案已发布: Oct 1, 1996
    This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou
  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, 修订版: A, 档案已发布: Feb 6, 2015

模型线

制造商分类

  • Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Latch