Datasheet Texas Instruments SN74ALVTH16373 — 数据表

制造商	Texas Instruments
系列	SN74ALVTH16373

具有三态输出的2.5V / 3.3V 16位透明D类锁存器

数据表

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PDF, 825 Kb, 修订版: F, 档案已发布: Jan 8, 1999

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价格

状态

	74ALVTH16373GRE4	74ALVTH16373GRG4	74ALVTH16373VRE4	74ALVTH16373VRG4	SN74ALVTH16373DL	SN74ALVTH16373DLR	SN74ALVTH16373GR	SN74ALVTH16373VR
Lifecycle Status	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)
Manufacture's Sample Availability	No	No	No	No	No	No	No	No

打包

	74ALVTH16373GRE4	74ALVTH16373GRG4	74ALVTH16373VRE4	74ALVTH16373VRG4	SN74ALVTH16373DL	SN74ALVTH16373DLR	SN74ALVTH16373GR	SN74ALVTH16373VR
N	1	2	3	4	5	6	7	8
Pin	48	48	48	48	48	48	48	48
Package Type	DGG	DGG	DGV	DGV	DL	DL	DGG	DGV
Industry STD Term	TSSOP	TSSOP	TVSOP	TVSOP	SSOP	SSOP	TSSOP	TVSOP
JEDEC Code	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G
Package QTY	2000	2000	2000	2000	25	1000	2000	2000
Carrier	LARGE T&R	LARGE T&R	LARGE T&R	LARGE T&R	TUBE	LARGE T&R	LARGE T&R	LARGE T&R
Device Marking	ALVTH16373	ALVTH16373	VT373	VT373	ALVTH16373	ALVTH16373	ALVTH16373	VT373
Width (mm)	6.1	6.1	4.4	4.4	7.49	7.49	6.1	4.4
Length (mm)	12.5	12.5	9.7	9.7	15.88	15.88	12.5	9.7
Thickness (mm)	1.15	1.15	1.05	1.05	2.59	2.59	1.15	1.05
Pitch (mm)	.5	.5	.4	.4	.635	.635	.5	.4
Max Height (mm)	1.2	1.2	1.2	1.2	2.79	2.79	1.2	1.2
Mechanical Data	下载	下载	下载	下载	下载	下载	下载	下载

参数化

Parameters / Models	74ALVTH16373GRE4	74ALVTH16373GRG4	74ALVTH16373VRE4	74ALVTH16373VRG4	SN74ALVTH16373DL	SN74ALVTH16373DLR	SN74ALVTH16373GR	SN74ALVTH16373VR
3-State Output	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes
Bits	16	16	16	16	16	16	16	16
F @ Nom Voltage(Max), Mhz	250	250	250	250	250	250	250	250
ICC @ Nom Voltage(Max), mA	5	5	5	5	5	5	5	5
Operating Temperature Range, C	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85
Output Drive (IOL/IOH)(Max), mA	64/-32	64/-32	64/-32	64/-32	64/-32	64/-32	64/-32	64/-32
Package Group	TSSOP	TSSOP	TVSOP	TVSOP	SSOP	SSOP	TSSOP	TVSOP
Package Size: mm2:W x L, PKG	48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)	48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)	48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)	48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)	48SSOP: 164 mm2: 10.35 x 15.88(SSOP)	48SSOP: 164 mm2: 10.35 x 15.88(SSOP)	48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)	48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)
Rating	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog
Schmitt Trigger	No	No	No	No	No	No	No	No
Technology Family	ALVT	ALVT	ALVT	ALVT	ALVT	ALVT	ALVT	ALVT
VCC(Max), V	3.6	3.6	3.6	3.6	3.6	3.6	3.6	3.6
VCC(Min), V	2.3	2.3	2.3	2.3	2.3	2.3	2.3	2.3
Voltage(Nom), V	2.5,3.3	2.5,3.3	2.5,3.3	2.5,3.3	2.5,3.3	2.5,3.3	2.5,3.3	2.5,3.3
tpd @ Nom Voltage(Max), ns	3.8,3.3	3.8,3.3	3.8,3.3	3.8,3.3	3.8,3.3	3.8,3.3	3.8,3.3	3.8,3.3

生态计划

	74ALVTH16373GRE4	74ALVTH16373GRG4	74ALVTH16373VRE4	74ALVTH16373VRG4	SN74ALVTH16373DL	SN74ALVTH16373DLR	SN74ALVTH16373GR	SN74ALVTH16373VR
RoHS	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant

应用须知

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Advanced Low-Voltage Technology
PDF, 59 Kb, 档案已发布: Jul 27, 1999
ALVT, the advanced low-voltage logic family, offers high-performance BiCMOS devices that are functional at 3.3-V and 2.5-V V sub CC and have low propagation delay, low static-power consumption, and 64 mA current drive. Other features include 5-V tolerance; auto3-state; bus hold; partial power down, hot insertion, and live insertion; and excellent simultaneous-switching and output-skew performance.
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Bus-Hold Circuit
PDF, 418 Kb, 档案已发布: Feb 5, 2001
When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
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16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
PDF, 895 Kb, 修订版: B, 档案已发布: May 22, 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
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Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
PDF, 209 Kb, 档案已发布: May 10, 2002
Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
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Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
PDF, 154 Kb, 修订版: A, 档案已发布: Sep 8, 1999
In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families
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Power-Up Behavior of Clocked Devices (Rev. A)
PDF, 34 Kb, 修订版: A, 档案已发布: Feb 6, 2015

模型线

系列: SN74ALVTH16373 (8)

74ALVTH16373GRE4 74ALVTH16373GRG4 74ALVTH16373VRE4 74ALVTH16373VRG4 SN74ALVTH16373DL SN74ALVTH16373DLR SN74ALVTH16373GR SN74ALVTH16373VR

制造商分类

Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Latch