Datasheet Texas Instruments SN74AUP2G125 — 数据表

制造商Texas Instruments
系列SN74AUP2G125
Datasheet Texas Instruments SN74AUP2G125

具有三态输出的低功耗双总线缓冲门

数据表

SN74AUP2G125 Low-Power Dual Bus Buffer Gate With 3-State Outputs datasheet
PDF, 1.3 Mb, 修订版: D, 档案已发布: May 18, 2010
从文件中提取

价格

状态

SN74AUP2G125DCURSN74AUP2G125DQERSN74AUP2G125RSERSN74AUP2G125YFPRSN74AUP2G125YZPR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYesYesYesYes

打包

SN74AUP2G125DCURSN74AUP2G125DQERSN74AUP2G125RSERSN74AUP2G125YFPRSN74AUP2G125YZPR
N12345
Pin88888
Package TypeDCUDQERSEYFPYZP
Industry STD TermVSSOPX2SONUQFNDSBGADSBGA
JEDEC CodeR-PDSO-GR-PSSO-NS-PQFP-NR-XBGA-NR-XBGA-N
Package QTY30005000500030003000
CarrierLARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&R
Device MarkingH25RPVPVHMNHMN
Width (mm)211.52.25
Length (mm)2.31.41.51.25
Thickness (mm).85.37.55.31
Pitch (mm).5.35.5.4.5
Max Height (mm).9.4.6.5.5
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参数化

Parameters / ModelsSN74AUP2G125DCUR
SN74AUP2G125DCUR
SN74AUP2G125DQER
SN74AUP2G125DQER
SN74AUP2G125RSER
SN74AUP2G125RSER
SN74AUP2G125YFPR
SN74AUP2G125YFPR
SN74AUP2G125YZPR
SN74AUP2G125YZPR
3-State OutputYesYesYesYesYes
Bits22222
F @ Nom Voltage(Max), Mhz100100100100100
Gate TypeBUFFERBUFFERBUFFERBUFFERBUFFER
ICC @ Nom Voltage(Max), mA0.00090.00090.00090.00090.0009
LogicTrueTrueTrueTrueTrue
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA4/-44/-44/-44/-44/-4
Package GroupVSSOPX2SONUQFNDSBGADSBGA
Package Size: mm2:W x L, PKG8VSSOP: 6 mm2: 3.1 x 2(VSSOP)8X2SON: 1 mm2: 1 x 1.4(X2SON)8UQFN: 2 mm2: 1.5 x 1.5(UQFN)See datasheet (DSBGA)See datasheet (DSBGA)
RatingCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNo
Special FeaturesIOFF,low power consumption,low tpd,3-stateIOFF,low power consumption,low tpd,3-stateIOFF,low power consumption,low tpd,3-stateIOFF,low power consumption,low tpd,3-stateIOFF,low power consumption,low tpd,3-state
Sub-FamilyNon-Inverting Buffer/DriverNon-Inverting Buffer/DriverNon-Inverting Buffer/DriverNon-Inverting Buffer/DriverNon-Inverting Buffer/Driver
Technology FamilyAUPAUPAUPAUPAUP
VCC(Max), V3.63.63.63.63.6
VCC(Min), V0.80.80.80.80.8
Voltage(Nom), V0.8,1.2,1.5,1.8,2.5,3.30.8,1.2,1.5,1.8,2.5,3.30.8,1.2,1.5,1.8,2.5,3.30.8,1.2,1.5,1.8,2.5,3.30.8,1.2,1.5,1.8,2.5,3.3
tpd @ Nom Voltage(Max), ns37.9,30.2,17.2,13.0,8.3,6.537.9,30.2,17.2,13.0,8.3,6.537.9,30.2,17.2,13.0,8.3,6.537.9,30.2,17.2,13.0,8.3,6.537.9,30.2,17.2,13.0,8.3,6.5

生态计划

SN74AUP2G125DCURSN74AUP2G125DQERSN74AUP2G125RSERSN74AUP2G125YFPRSN74AUP2G125YZPR
RoHSCompliantCompliantCompliantCompliantCompliant

应用须知

  • Understanding Schmitt Triggers
    PDF, 80 Kb, 档案已发布: Sep 21, 2011

模型线

制造商分类

  • Semiconductors> Logic> Little Logic