Datasheet Texas Instruments SN74AUP2G32 — 数据表
| 制造商 | Texas Instruments |
| 系列 | SN74AUP2G32 |
低功耗双路2输入正或门
数据表
SN74AUP2G32 Low-Power Dual 2-Input Positive-OR Gate datasheet
PDF, 1.2 Mb, 修订版: B, 档案已发布: May 18, 2010
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价格
状态
| SN74AUP2G32DCUR | SN74AUP2G32DQER | SN74AUP2G32RSER | SN74AUP2G32YFPR | |
|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | Yes | Yes | Yes |
打包
| SN74AUP2G32DCUR | SN74AUP2G32DQER | SN74AUP2G32RSER | SN74AUP2G32YFPR | |
|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 |
| Pin | 8 | 8 | 8 | 8 |
| Package Type | DCU | DQE | RSE | YFP |
| Industry STD Term | VSSOP | X2SON | UQFN | DSBGA |
| JEDEC Code | R-PDSO-G | R-PSSO-N | S-PQFP-N | R-XBGA-N |
| Package QTY | 3000 | 5000 | 5000 | 3000 |
| Carrier | LARGE T&R | LARGE T&R | LARGE T&R | LARGE T&R |
| Device Marking | H32R | PS | PS | HGN |
| Width (mm) | 2 | 1 | 1.5 | |
| Length (mm) | 2.3 | 1.4 | 1.5 | |
| Thickness (mm) | .85 | .37 | .55 | |
| Pitch (mm) | .5 | .35 | .5 | .4 |
| Max Height (mm) | .9 | .4 | .6 | .5 |
| Mechanical Data | 下载 | 下载 | 下载 | 下载 |
参数化
| Parameters / Models | SN74AUP2G32DCUR | SN74AUP2G32DQER | SN74AUP2G32RSER | SN74AUP2G32YFPR |
|---|---|---|---|---|
| 3-State Output | No | No | No | No |
| Bits | 2 | 2 | 2 | 2 |
| F @ Nom Voltage(Max), Mhz | 100 | 100 | 100 | 100 |
| Gate Type | OR | OR | OR | OR |
| ICC @ Nom Voltage(Max), mA | 0.0009 | 0.0009 | 0.0009 | 0.0009 |
| Logic | True | True | True | True |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
| Output Drive (IOL/IOH)(Max), mA | 4/-4 | 4/-4 | 4/-4 | 4/-4 |
| Package Group | VSSOP | X2SON | UQFN | DSBGA |
| Package Size: mm2:W x L, PKG | 8VSSOP: 6 mm2: 3.1 x 2(VSSOP) | 8X2SON: 1 mm2: 1 x 1.4(X2SON) | 8UQFN: 2 mm2: 1.5 x 1.5(UQFN) | See datasheet (DSBGA) |
| Rating | Catalog | Catalog | Catalog | Catalog |
| Schmitt Trigger | No | No | No | No |
| Special Features | IOFF,low power consumption,low tpd | IOFF,low power consumption,low tpd | IOFF,low power consumption,low tpd | IOFF,low power consumption,low tpd |
| Sub-Family | OR Gate | OR Gate | OR Gate | OR Gate |
| Technology Family | AUP | AUP | AUP | AUP |
| VCC(Max), V | 3.6 | 3.6 | 3.6 | 3.6 |
| VCC(Min), V | 0.8 | 0.8 | 0.8 | 0.8 |
| Voltage(Nom), V | 0.8,1.2,1.5,1.8,2.5,3.3 | 0.8,1.2,1.5,1.8,2.5,3.3 | 0.8,1.2,1.5,1.8,2.5,3.3 | 0.8,1.2,1.5,1.8,2.5,3.3 |
| tpd @ Nom Voltage(Max), ns | 32.8,20.9,14.2,11,7.6,6.2 | 32.8,20.9,14.2,11,7.6,6.2 | 32.8,20.9,14.2,11,7.6,6.2 | 32.8,20.9,14.2,11,7.6,6.2 |
生态计划
| SN74AUP2G32DCUR | SN74AUP2G32DQER | SN74AUP2G32RSER | SN74AUP2G32YFPR | |
|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant |
应用须知
- Understanding Schmitt TriggersPDF, 80 Kb, 档案已发布: Sep 21, 2011
模型线
系列: SN74AUP2G32 (4)
制造商分类
- Semiconductors> Logic> Little Logic