Datasheet Texas Instruments SN74AVC16244 — 数据表

制造商Texas Instruments
系列SN74AVC16244
Datasheet Texas Instruments SN74AVC16244

具有三态输出的16位缓冲器/驱动器

数据表

SN74AVC16244 datasheet
PDF, 831 Kb, 修订版: N, 档案已发布: Jul 21, 2004
从文件中提取

价格

状态

74AVC16244DGGRE474AVC16244DGVRG4SN74AVC16244DGGRSN74AVC16244DGVRSN74AVC16244GQLRSN74AVC16244ZQLR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Obsolete (Manufacturer has discontinued the production of the device)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYesYesYesYesYes

打包

74AVC16244DGGRE474AVC16244DGVRG4SN74AVC16244DGGRSN74AVC16244DGVRSN74AVC16244GQLRSN74AVC16244ZQLR
N123456
Pin484848485656
Package TypeDGGDGVDGGDGVGQLZQL
Industry STD TermTSSOPTVSOPTSSOPTVSOPBGA MICROSTAR JUNIORBGA MICROSTAR JUNIOR
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PBGA-NR-PBGA-N
Package QTY20002000200020001000
CarrierLARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&R
Device MarkingAVC16244CVA244AVC16244CVA244CVA244
Width (mm)6.14.46.14.44.54.5
Length (mm)12.59.712.59.777
Thickness (mm)1.151.051.151.05.75.75
Pitch (mm).5.4.5.4.65.65
Max Height (mm)1.21.21.21.211
Mechanical Data下载下载下载下载下载下载

参数化

Parameters / Models74AVC16244DGGRE4
74AVC16244DGGRE4
74AVC16244DGVRG4
74AVC16244DGVRG4
SN74AVC16244DGGR
SN74AVC16244DGGR
SN74AVC16244DGVR
SN74AVC16244DGVR
SN74AVC16244GQLR
SN74AVC16244GQLR
SN74AVC16244ZQLR
SN74AVC16244ZQLR
Approx. Price (US$)2.12 | 1ku
Bits1616161616
Bits(#)16
F @ Nom Voltage(Max), Mhz200200200200200
F @ Nom Voltage(Max)(Mhz)200
ICC @ Nom Voltage(Max), mA0.040.040.040.040.04
ICC @ Nom Voltage(Max)(mA)0.04
Input TypeLVTTL
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85
Output Drive (IOL/IOH)(Max), mA-12/12-12/12-12/12-12/12-12/12
Output Drive (IOL/IOH)(Max)(mA)-12/12
Output TypeLVTTL
Package GroupTSSOPTVSOPTSSOPTVSOPBGA MICROSTAR JUNIORBGA MICROSTAR JUNIOR
Package Size: mm2:W x L, PKG48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)
Package Size: mm2:W x L (PKG)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)
RatingCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNo
Technology FamilyAVCAVCAVCAVCAVCAVC
VCC(Max), V3.63.63.63.63.6
VCC(Max)(V)3.6
VCC(Min), V1.21.21.21.21.2
VCC(Min)(V)1.2
Voltage(Nom), V1.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.3
Voltage(Nom)(V)1.2
1.5
1.8
2.5
3.3
tpd @ Nom Voltage(Max), ns3.1,3.3,2.9,1.9,1.73.1,3.3,2.9,1.9,1.73.1,3.3,2.9,1.9,1.73.1,3.3,2.9,1.9,1.73.1,3.3,2.9,1.9,1.7
tpd @ Nom Voltage(Max)(ns)3.1
3.3
2.9
1.9
1.7

生态计划

74AVC16244DGGRE474AVC16244DGVRG4SN74AVC16244DGGRSN74AVC16244DGVRSN74AVC16244GQLRSN74AVC16244ZQLR
RoHSCompliantCompliantCompliantCompliantNot CompliantCompliant
Pb FreeNo

应用须知

  • Simultaneous-Switching Performance of TI Logic Devices (Rev. B)
    PDF, 378 Kb, 修订版: B, 档案已发布: Feb 23, 2005
    Simultaneous-switching noise can generate and propagate glitches in electronic systems. Therefore, system designers are faced with challenges to minimize simultaneous-switching noise, while increasing switching speed and improving signal quality. This report presents the performance of different TI logic devices under various simultaneous-switching conditions. Factors such as the number of bits sw
  • Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B)
    PDF, 126 Kb, 修订版: B, 档案已发布: Jul 7, 1999
    Texas Instruments (TI[TM]) next-generation logic is called the Advanced Very-low-voltage CMOS (AVC) family. The AVCfamily features TI?s Dynamic Output Control (DOC[TM]) circuit (patent pending). DOC circuitry automatically lowers the outputimpedance of the circuit at the beginning of a signal transition, providing enough current to achieve high signaling speeds, thensubsequently raises the i
  • AVC Logic Family Technology and Applications (Rev. A)
    PDF, 148 Kb, 修订版: A, 档案已发布: Aug 26, 1998
    Texas Instruments (TI?) announces the industry?s first logic family to achieve maximum propagation delays of less than 2 ns at 2.5 V. TI?s next-generation logic is the Advanced Very-low-voltage CMOS (AVC) family. Although optimized for 2.5-V systems, AVC logic supports mixed-voltage systems because it is compatible with 3.3-V and 1.8-V devices. The AVC family features TI?s Dynamic Output Control (
  • Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B)
    PDF, 390 Kb, 修订版: B, 档案已发布: Apr 30, 2015
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, 修订版: B, 档案已发布: May 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Selecting the Right Level Translation Solution (Rev. A)
    PDF, 313 Kb, 修订版: A, 档案已发布: Jun 22, 2004
    Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati

模型线

制造商分类

  • Semiconductors> Logic> Buffer/Driver/Transceiver> Non-Inverting Buffer/Driver