Datasheet Texas Instruments SN74AVC16T245 — 数据表

制造商Texas Instruments
系列SN74AVC16T245
Datasheet Texas Instruments SN74AVC16T245

具有可配置电压电平转换和三态输出的16位双电源总线收发器

数据表

SN74AVC16T245 16-Bit Dual-Supply Bus Transceiver with Configurable Level-Shifting / Voltage Translation and Tri-State Outputs datasheet
PDF, 1.3 Mb, 修订版: E, 档案已发布: Nov 5, 2015
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价格

状态

74AVC16T245DGGRE474AVC16T245DGGRG474AVC16T245DGVRE4AVC16T245DGGR-DSN74AVC16T245DGGRSN74AVC16T245DGVRSN74AVC16T245GQLRSN74AVC16T245ZQLR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Obsolete (Manufacturer has discontinued the production of the device)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYesYesNoYesYesYesYes

打包

74AVC16T245DGGRE474AVC16T245DGGRG474AVC16T245DGVRE4AVC16T245DGGR-DSN74AVC16T245DGGRSN74AVC16T245DGVRSN74AVC16T245GQLRSN74AVC16T245ZQLR
N12345678
Pin4848484848485656
Package TypeDGGDGGDGVDGGDGGDGVGQLZQL
Industry STD TermTSSOPTSSOPTVSOPTSSOPTSSOPTVSOPBGA MICROSTAR JUNIORBGA MICROSTAR JUNIOR
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PBGA-NR-PBGA-N
Package QTY2000200020002000200020001000
CarrierLARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&R
Device MarkingAVC16T245AVC16T245WF245AVC16T245AVC16T245WF245WF245WF245
Width (mm)6.16.14.46.16.14.44.54.5
Length (mm)12.512.59.712.512.59.777
Thickness (mm)1.151.151.051.151.151.05.75.75
Pitch (mm).5.5.4.5.5.4.65.65
Max Height (mm)1.21.21.21.21.21.211
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参数化

Parameters / Models74AVC16T245DGGRE4
74AVC16T245DGGRE4
74AVC16T245DGGRG4
74AVC16T245DGGRG4
74AVC16T245DGVRE4
74AVC16T245DGVRE4
AVC16T245DGGR-D
AVC16T245DGGR-D
SN74AVC16T245DGGR
SN74AVC16T245DGGR
SN74AVC16T245DGVR
SN74AVC16T245DGVR
SN74AVC16T245GQLR
SN74AVC16T245GQLR
SN74AVC16T245ZQLR
SN74AVC16T245ZQLR
Approx. Price (US$)0.89 | 1ku
Bits16161616161616
Bits(#)16
F @ Nom Voltage(Max), Mhz100100100100100100100
F @ Nom Voltage(Max)(Mhz)100
ICC @ Nom Voltage(Max), mA0.0450.0450.0450.0450.0450.0450.045
ICC @ Nom Voltage(Max)(mA)0.045
Input TypeCMOS
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85
Output TypeCMOS
Package GroupTSSOPTSSOPTVSOPTSSOPTSSOPTVSOPBGA MICROSTAR JUNIORBGA MICROSTAR JUNIOR
Package Size: mm2:W x L, PKG48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)
Package Size: mm2:W x L (PKG)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNo
Technology FamilyAVCAVCAVCAVCAVCAVCAVCAVC
VCC(Max), V3.63.63.63.63.63.63.6
VCC(Max)(V)3.6
VCC(Min), V1.21.21.21.21.21.21.2
VCC(Min)(V)1.2
Voltage(Nom), V1.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.3
Voltage(Nom)(V)1.2
1.5
1.8
2.5
3.3
tpd @ Nom Voltage(Max), ns4.1,3.6,3.4,3.24.1,3.6,3.4,3.24.1,3.6,3.4,3.24.1,3.6,3.4,3.24.1,3.6,3.4,3.24.1,3.6,3.4,3.24.1,3.6,3.4,3.2
tpd @ Nom Voltage(Max)(ns)4.1
3.6
3.4
3.2

生态计划

74AVC16T245DGGRE474AVC16T245DGGRG474AVC16T245DGVRE4AVC16T245DGGR-DSN74AVC16T245DGGRSN74AVC16T245DGVRSN74AVC16T245GQLRSN74AVC16T245ZQLR
RoHSCompliantCompliantCompliantCompliantCompliantCompliantNot CompliantCompliant
Pb FreeNo

应用须知

  • Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B)
    PDF, 126 Kb, 修订版: B, 档案已发布: Jul 7, 1999
    Texas Instruments (TI[TM]) next-generation logic is called the Advanced Very-low-voltage CMOS (AVC) family. The AVCfamily features TI?s Dynamic Output Control (DOC[TM]) circuit (patent pending). DOC circuitry automatically lowers the outputimpedance of the circuit at the beginning of a signal transition, providing enough current to achieve high signaling speeds, thensubsequently raises the i
  • AVC Logic Family Technology and Applications (Rev. A)
    PDF, 148 Kb, 修订版: A, 档案已发布: Aug 26, 1998
    Texas Instruments (TI?) announces the industry?s first logic family to achieve maximum propagation delays of less than 2 ns at 2.5 V. TI?s next-generation logic is the Advanced Very-low-voltage CMOS (AVC) family. Although optimized for 2.5-V systems, AVC logic supports mixed-voltage systems because it is compatible with 3.3-V and 1.8-V devices. The AVC family features TI?s Dynamic Output Control (
  • Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B)
    PDF, 390 Kb, 修订版: B, 档案已发布: Apr 30, 2015
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, 修订版: B, 档案已发布: May 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Selecting the Right Level Translation Solution (Rev. A)
    PDF, 313 Kb, 修订版: A, 档案已发布: Jun 22, 2004
    Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati

模型线

制造商分类

  • Semiconductors> Logic> Voltage Level Translation> Direction Controlled Voltage Translation