Datasheet Texas Instruments SN74BCT8373ADW — 数据表
| 制造商 | Texas Instruments |
| 系列 | SN74BCT8373A |
| 零件号 | SN74BCT8373ADW |
具有八进制D型闩锁的IEEE Std 1149.1（JTAG）边界扫描测试设备24-SOIC 0至70
数据表
Scan Test Devices With Octal D-Type Latches datasheet
PDF, 421 Kb, 修订版: F, 档案已发布: Jul 1, 1996
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
打包
| Pin | 24 |
| Package Type | DW |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 25 |
| Carrier | TUBE |
| Device Marking | BCT8373A |
| Width (mm) | 7.5 |
| Length (mm) | 15.4 |
| Thickness (mm) | 2.35 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 2.65 |
| Mechanical Data | 下载 |
参数化
| Bits | 8 |
| F @ Nom Voltage(Max) | 70 Mhz |
| ICC @ Nom Voltage(Max) | 52 mA |
| Operating Temperature Range | 0 to 70 C |
| Output Drive (IOL/IOH)(Max) | 64/-15 mA |
| Package Group | SOIC |
| Package Size: mm2:W x L | 24SOIC: 160 mm2: 10.3 x 15.5(SOIC) PKG |
| Rating | Catalog |
| Technology Family | BCT |
| VCC(Max) | 5.5 V |
| VCC(Min) | 4.5 V |
| Voltage(Nom) | 5 V |
| tpd @ Nom Voltage(Max) | 9.5 ns |
生态计划
| RoHS | Compliant |
应用须知
- Programming CPLDs Via the 'LVT8986 LASPPDF, 819 Kb, 档案已发布: Nov 1, 2005
This application report summarizes key information required for understanding the 'LVT8986 linking addressable scan ports (LASPs) multidrop addressable IEEE Std 1149.1 (JTAG) test access port (TAP) transceiver. This report includes information about the 'LVT8986 secondary TAPs, bypass and linking shadow protocol, scan-path description languages, serial vector format files, and an example of how to
模型线
系列: SN74BCT8373A (1)
- SN74BCT8373ADW
制造商分类
- Semiconductors > Logic > Specialty Logic > Boundary Scan (JTAG) Logic