Datasheet Texas Instruments SN74GTL2107 — 数据表

制造商Texas Instruments
系列SN74GTL2107
Datasheet Texas Instruments SN74GTL2107

12 位 GTL-/GTL/GTL+ 转 LVTTL 转换器

数据表

SN74GTL2107 datasheet
PDF, 728 Kb, 档案已发布: Jul 1, 2006
从文件中提取

价格

状态

SN74GTL2107PWSN74GTL2107PWG4SN74GTL2107PWRSN74GTL2107PWRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoYesYes

打包

SN74GTL2107PWSN74GTL2107PWG4SN74GTL2107PWRSN74GTL2107PWRG4
N1234
Pin28282828
Package TypePWPWPWPW
Industry STD TermTSSOPTSSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY505020002000
CarrierTUBETUBELARGE T&RLARGE T&R
Device MarkingGK2107GK2107GK2107GK2107
Width (mm)4.44.44.44.4
Length (mm)9.79.79.79.7
Thickness (mm)1111
Pitch (mm).65.65.65.65
Max Height (mm)1.21.21.21.2
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参数化

Parameters / ModelsSN74GTL2107PW
SN74GTL2107PW
SN74GTL2107PWG4
SN74GTL2107PWG4
SN74GTL2107PWR
SN74GTL2107PWR
SN74GTL2107PWRG4
SN74GTL2107PWRG4
Bits12121212
F @ Nom Voltage(Max), Mhz95959595
ICC @ Nom Voltage(Max), mA12121212
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA-16/16-16/16-16/16-16/16
Package GroupTSSOPTSSOPTSSOPTSSOP
Package Size: mm2:W x L, PKG28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)
RatingCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNo
Technology FamilyGTLGTLGTLGTL
VCC(Max), V3.63.63.63.6
VCC(Min), V3333
Voltage(Nom), V3.33.33.33.3
tpd @ Nom Voltage(Max), ns10101010

生态计划

SN74GTL2107PWSN74GTL2107PWG4SN74GTL2107PWRSN74GTL2107PWRG4
RoHSCompliantCompliantCompliantCompliant

应用须知

  • GTL/BTL: A Low-Swing Solution for High-Speed Digital Logic (Rev. A)
    PDF, 184 Kb, 修订版: A, 档案已发布: Mar 1, 1997
    GTL and BTL transceivers provide high-performance, excellent signal integrity and cost-effectiveness in high-speed backplane and point-to-point applications. This document discusses the GTL and BTL devices input/output (I/O) structure, power consumption, simultaneous switching, slew rate, and signal integrity. Design considerations for using these devices are provided.
  • Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
    PDF, 209 Kb, 档案已发布: May 10, 2002
    Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features

模型线

制造商分类

  • Semiconductors> Logic> Universal Bus Function> Universal Bus Transceiver (UBT)