Datasheet Texas Instruments SN74HC112DG4 — 数据表
制造商 | Texas Instruments |
系列 | SN74HC112 |
零件号 | SN74HC112DG4 |
具有清晰和预设16-SOIC的双JK负缘触发触发器-40至85
数据表
价格
状态
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
打包
Pin | 16 |
Package Type | D |
Industry STD Term | SOIC |
JEDEC Code | R-PDSO-G |
Package QTY | 40 |
Carrier | TUBE |
Device Marking | HC112 |
Width (mm) | 3.91 |
Length (mm) | 9.9 |
Thickness (mm) | 1.58 |
Pitch (mm) | 1.27 |
Max Height (mm) | 1.75 |
Mechanical Data | 下载 |
参数化
Bits | 2 |
F @ Nom Voltage(Max) | 70 Mhz |
ICC @ Nom Voltage(Max) | 0.04 mA |
Output Drive (IOL/IOH)(Max) | -4/4 mA |
Package Group | SOIC |
Package Size: mm2:W x L | 16SOIC: 59 mm2: 6 x 9.9(SOIC) PKG |
Rating | Catalog |
Schmitt Trigger | No |
Technology Family | HC |
VCC(Max) | 6 V |
VCC(Min) | 2 V |
Voltage(Nom) | 3.3,5 V |
tpd @ Nom Voltage(Max) | 41 ns |
生态计划
RoHS | Compliant |
应用须知
- HCMOS Design Considerations (Rev. A)PDF, 207 Kb, 修订版: A, 档案已发布: Sep 9, 2002
This document describes a potential problem designers may encounter when using high-speed CMOS (HC) logic devices. There also is a broad range of CMOS-system to non-CMOS-system interfaces that need to be considered. The design engineer inevitably encounters these interfaces. Key considerations for handling these interfaces are also discussed in this book.
模型线
系列: SN74HC112 (9)
制造商分类
- Semiconductors > Logic > Flip-Flop/Latch/Register > J-K Flip-Flop