Datasheet Texas Instruments SN74HC112 — 数据表

制造商Texas Instruments
系列SN74HC112
Datasheet Texas Instruments SN74HC112

具有清晰和预置功能的双路JK负边沿触发触发器

数据表

SN54HC112, SN74HC112 datasheet
PDF, 598 Kb, 修订版: F, 档案已发布: Sep 26, 2003
从文件中提取

价格

状态

SN74HC112DSN74HC112DE4SN74HC112DG4SN74HC112DRSN74HC112DRG4SN74HC112DTSN74HC112NSN74HC112N3SN74HC112NE4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Obsolete (Manufacturer has discontinued the production of the device)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNoNoNo

打包

SN74HC112DSN74HC112DE4SN74HC112DG4SN74HC112DRSN74HC112DRG4SN74HC112DTSN74HC112NSN74HC112N3SN74HC112NE4
N123456789
Pin161616161616161616
Package TypeDDDDDDNNN
Industry STD TermSOICSOICSOICSOICSOICSOICPDIPPDIPPDIP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDIP-TR-PDIP-TR-PDIP-T
Package QTY404040250025002502525
CarrierTUBETUBETUBELARGE T&RLARGE T&RSMALL T&RTUBETUBE
Device MarkingHC112HC112HC112HC112HC112HC112SN74HC112NSN74HC112N
Width (mm)3.913.913.913.913.913.916.356.356.35
Length (mm)9.99.99.99.99.99.919.319.319.3
Thickness (mm)1.581.581.581.581.581.583.93.93.9
Pitch (mm)1.271.271.271.271.271.272.542.542.54
Max Height (mm)1.751.751.751.751.751.755.085.085.08
Mechanical Data下载下载下载下载下载下载下载下载下载

参数化

Parameters / ModelsSN74HC112D
SN74HC112D
SN74HC112DE4
SN74HC112DE4
SN74HC112DG4
SN74HC112DG4
SN74HC112DR
SN74HC112DR
SN74HC112DRG4
SN74HC112DRG4
SN74HC112DT
SN74HC112DT
SN74HC112N
SN74HC112N
SN74HC112N3
SN74HC112N3
SN74HC112NE4
SN74HC112NE4
Approx. Price (US$)0.12 | 1ku
Bits22222222
Bits(#)2
F @ Nom Voltage(Max), Mhz7070707070707070
F @ Nom Voltage(Max)(Mhz)70
ICC @ Nom Voltage(Max), mA0.040.040.040.040.040.040.040.04
ICC @ Nom Voltage(Max)(mA)0.04
Input TypeLVTTL/CMOS
Output Drive (IOL/IOH)(Max), mA-4/4-4/4-4/4-4/4-4/4-4/4-4/4-4/4
Output Drive (IOL/IOH)(Max)(mA)-4/4
Output TypeCMOS
Package GroupSOICSOICSOICSOICSOICSOICPDIPPDIPPDIP
Package Size: mm2:W x L, PKG16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)See datasheet (PDIP)See datasheet (PDIP)
Package Size: mm2:W x L (PKG)See datasheet (PDIP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNoNo
Technology FamilyHCHCHCHCHCHCHCHCHC
VCC(Max), V66666666
VCC(Max)(V)6
VCC(Min), V22222222
VCC(Min)(V)2
Voltage(Nom), V3.3,53.3,53.3,53.3,53.3,53.3,53.3,53.3,5
Voltage(Nom)(V)3.3
5
tpd @ Nom Voltage(Max), ns4141414141414141
tpd @ Nom Voltage(Max)(ns)41

生态计划

SN74HC112DSN74HC112DE4SN74HC112DG4SN74HC112DRSN74HC112DRG4SN74HC112DTSN74HC112NSN74HC112N3SN74HC112NE4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantNot CompliantCompliant
Pb FreeYesNoYes

应用须知

  • HCMOS Design Considerations (Rev. A)
    PDF, 207 Kb, 修订版: A, 档案已发布: Sep 9, 2002
    This document describes a potential problem designers may encounter when using high-speed CMOS (HC) logic devices. There also is a broad range of CMOS-system to non-CMOS-system interfaces that need to be considered. The design engineer inevitably encounters these interfaces. Key considerations for handling these interfaces are also discussed in this book.

模型线

制造商分类

  • Semiconductors> Logic> Flip-Flop/Latch/Register> J-K Flip-Flop