Datasheet Texas Instruments SN74LS51 — 数据表

制造商Texas Instruments
系列SN74LS51
Datasheet Texas Instruments SN74LS51

2宽2输入和2宽3输入与门或反门

数据表

AND-OR-Invert Gates datasheet
PDF, 1.1 Mb, 档案已发布: Mar 1, 1988
从文件中提取

价格

状态

SN74LS51DSN74LS51DRSN74LS51NSN74LS51NSR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNo

打包

SN74LS51DSN74LS51DRSN74LS51NSN74LS51NSR
N1234
Pin14141414
Package TypeDDNNS
Industry STD TermSOICSOICPDIPSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDIP-TR-PDSO-G
Package QTY502500252000
CarrierTUBELARGE T&RTUBELARGE T&R
Device MarkingLS51LS51SN74LS51N74LS51
Width (mm)3.913.916.355.3
Length (mm)8.658.6519.310.3
Thickness (mm)1.581.583.91.95
Pitch (mm)1.271.272.541.27
Max Height (mm)1.751.755.082
Mechanical Data下载下载下载下载

参数化

Parameters / ModelsSN74LS51D
SN74LS51D
SN74LS51DR
SN74LS51DR
SN74LS51N
SN74LS51N
SN74LS51NSR
SN74LS51NSR
Bits2222
F @ Nom Voltage(Max), Mhz35353535
ICC @ Nom Voltage(Max), mA0.0140.0140.0140.014
Operating Temperature Range, C0 to 700 to 700 to 700 to 70
Output Drive (IOL/IOH)(Max), mA0.4/-160.4/-160.4/-160.4/-16
Package GroupSOICSOICPDIPSO
Package Size: mm2:W x L, PKG14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)See datasheet (PDIP)14SO: 80 mm2: 7.8 x 10.2(SO)
RatingCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNo
Technology FamilyLSLSLSLS
VCC(Max), V5.255.255.255.25
VCC(Min), V4.754.754.754.75
Voltage(Nom), V5555
tpd @ Nom Voltage(Max), ns20202020

生态计划

SN74LS51DSN74LS51DRSN74LS51NSN74LS51NSR
RoHSCompliantCompliantCompliantCompliant
Pb FreeYes

应用须知

  • Designing with the SN54/74LS123 (Rev. A)
    PDF, 118 Kb, 修订版: A, 档案已发布: Mar 1, 1997
    The Texas Instruments (TI) SN54/74LS123 dual retriggerable monostable multivibrator is a one-shot device capable of verylong output pulses and up to 100% duty cycle. The ?LS123 also features dc triggering from gated low-level active A andhigh-level active B inputs and provides a clear input that terminates the output pulse of any predetermined time independentof timing components R ext and

模型线

制造商分类

  • Semiconductors> Logic> Gate> Combination Gate