Datasheet Texas Instruments SN74LS645 — 数据表

制造商	Texas Instruments
系列	SN74LS645

八路总线收发器

数据表

下载

PDF, 1.5 Mb, 修订版: A, 档案已发布: Apr 1, 1979

从文件中提取

价格

状态

	SN74LS645-1DW	SN74LS645-1DWG4	SN74LS645-1DWR	SN74LS645-1N	SN74LS645-1N3	SN74LS645-1NE4	SN74LS645-1NSR	SN74LS645DW	SN74LS645DWG4	SN74LS645DWR	SN74LS645N	SN74LS645N3	SN74LS645NE4	SN74LS645NSR
Lifecycle Status	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Obsolete (Manufacturer has discontinued the production of the device)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Obsolete (Manufacturer has discontinued the production of the device)	Active (Recommended for new designs)	Obsolete (Manufacturer has discontinued the production of the device)	Active (Recommended for new designs)	Active (Recommended for new designs)
Manufacture's Sample Availability	No	No	No	No	No	No	No	No	No	No	No	No	No	No

打包

	SN74LS645-1DW	SN74LS645-1DWG4	SN74LS645-1DWR	SN74LS645-1N	SN74LS645-1N3	SN74LS645-1NE4	SN74LS645-1NSR	SN74LS645DW	SN74LS645DWG4	SN74LS645DWR	SN74LS645N	SN74LS645N3	SN74LS645NE4	SN74LS645NSR
N	1	2	3	4	5	6	7	8	9	10	11	12	13	14
Pin	20	20	20	20	20	20	20	20	20	20	20	20	20	20
Package Type	DW	DW	DW	N	N	N	NS	DW	DW	DW	N	N	N	NS
Industry STD Term	SOIC	SOIC	SOIC	PDIP	PDIP	PDIP	SOP	SOIC	SOIC	SOIC	PDIP	PDIP	PDIP	SOP
JEDEC Code	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDIP-T	R-PDIP-T	R-PDIP-T	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDIP-T	R-PDIP-T	R-PDIP-T	R-PDSO-G
Package QTY	25	25	2000	20		20	2000	25	25		20		20	2000
Carrier	TUBE	TUBE	LARGE T&R	TUBE		TUBE	LARGE T&R	TUBE	TUBE		TUBE		TUBE	LARGE T&R
Device Marking	LS645-1	LS645-1	LS645-1	SN74LS645-1N		SN74LS645-1N	74LS645-1	LS645	LS645		SN74LS645N		SN74LS645N	74LS645
Width (mm)	7.5	7.5	7.5	6.35	6.35	6.35	5.3	7.5	7.5	7.5	6.35	6.35	6.35	5.3
Length (mm)	12.8	12.8	12.8	24.33	24.33	24.33	12.6	12.8	12.8	12.8	24.33	24.33	24.33	12.6
Thickness (mm)	2.35	2.35	2.35	4.57	4.57	4.57	1.95	2.35	2.35	2.35	4.57	4.57	4.57	1.95
Pitch (mm)	1.27	1.27	1.27	2.54	2.54	2.54	1.27	1.27	1.27	1.27	2.54	2.54	2.54	1.27
Max Height (mm)	2.65	2.65	2.65	5.08	5.08	5.08	2	2.65	2.65	2.65	5.08	5.08	5.08	2
Mechanical Data	下载	下载	下载	下载	下载	下载	下载	下载	下载	下载	下载	下载	下载	下载

参数化

Parameters / Models	SN74LS645-1DW	SN74LS645-1DWG4	SN74LS645-1DWR	SN74LS645-1N	SN74LS645-1N3	SN74LS645-1NE4	SN74LS645-1NSR	SN74LS645DW	SN74LS645DWG4	SN74LS645DWR	SN74LS645N	SN74LS645N3	SN74LS645NE4	SN74LS645NSR
Approx. Price (US$)					0.77 \| 1ku					0.77 \| 1ku		0.77 \| 1ku
Bits	8	8	8	8		8	8	8	8		8		8	8
Bits(#)					8					8		8
F @ Nom Voltage(Max), Mhz	35	35	35	35		35	35	35	35		35		35	35
F @ Nom Voltage(Max)(Mhz)					35					35		35
ICC @ Nom Voltage(Max), mA	0.09	0.09	0.09	0.09		0.09	0.09	0.09	0.09		0.09		0.09	0.09
ICC @ Nom Voltage(Max)(mA)					0.09					0.09		0.09
Input Type					TTL					TTL		TTL
Operating Temperature Range, C	0 to 70	0 to 70	0 to 70	0 to 70		0 to 70	0 to 70	0 to 70	0 to 70		0 to 70		0 to 70	0 to 70
Operating Temperature Range(C)					0 to 70					0 to 70		0 to 70
Output Drive (IOL/IOH)(Max), mA	-15/24	-15/24	-15/24	-15/24		-15/24	-15/24	-15/24	-15/24		-15/24		-15/24	-15/24
Output Drive (IOL/IOH)(Max)(mA)					-15/24					-15/24		-15/24
Output Type					TTL					TTL		TTL
Package Group	SOIC	SOIC	SOIC	PDIP	PDIP	PDIP	SO	SOIC	SOIC	SOIC	PDIP	PDIP	PDIP	SO
Package Size: mm2:W x L, PKG	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	See datasheet (PDIP)		See datasheet (PDIP)	20SO: 98 mm2: 7.8 x 12.6(SO)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)		See datasheet (PDIP)		See datasheet (PDIP)	20SO: 98 mm2: 7.8 x 12.6(SO)
Package Size: mm2:W x L (PKG)					See datasheet (PDIP)					See datasheet (PDIP)		See datasheet (PDIP)
Rating	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog
Schmitt Trigger	No	No	No	No	No	No	No	No	No	No	No	No	No	No
Technology Family	LS	LS	LS	LS	LS	LS	LS	LS	LS	LS	LS	LS	LS	LS
VCC(Max), V	5.25	5.25	5.25	5.25		5.25	5.25	5.25	5.25		5.25		5.25	5.25
VCC(Max)(V)					5.25					5.25		5.25
VCC(Min), V	4.75	4.75	4.75	4.75		4.75	4.75	4.75	4.75		4.75		4.75	4.75
VCC(Min)(V)					4.75					4.75		4.75
Voltage(Nom), V	5	5	5	5		5	5	5	5		5		5	5
Voltage(Nom)(V)					5					5		5
tpd @ Nom Voltage(Max), ns	15	15	15	15		15	15	15	15		15		15	15
tpd @ Nom Voltage(Max)(ns)					15					15		15

生态计划

	SN74LS645-1DW	SN74LS645-1DWG4	SN74LS645-1DWR	SN74LS645-1N	SN74LS645-1N3	SN74LS645-1NE4	SN74LS645-1NSR	SN74LS645DW	SN74LS645DWG4	SN74LS645DWR	SN74LS645N	SN74LS645N3	SN74LS645NE4	SN74LS645NSR
RoHS	Compliant	Compliant	Compliant	Compliant	Not Compliant	Compliant	Compliant	Compliant	Compliant	Not Compliant	Compliant	Not Compliant	Compliant	Compliant
Pb Free	Yes	Yes	Yes	Yes	No	No	No

应用须知

下载
Designing with the SN54/74LS123 (Rev. A)
PDF, 118 Kb, 修订版: A, 档案已发布: Mar 1, 1997
The Texas Instruments (TI) SN54/74LS123 dual retriggerable monostable multivibrator is a one-shot device capable of verylong output pulses and up to 100% duty cycle. The ?LS123 also features dc triggering from gated low-level active A andhigh-level active B inputs and provides a clear input that terminates the output pulse of any predetermined time independentof timing components R ext and

模型线

系列: SN74LS645 (14)

SN74LS645-1DW SN74LS645-1DWG4 SN74LS645-1DWR SN74LS645-1N SN74LS645-1N3 SN74LS645-1NE4 SN74LS645-1NSR SN74LS645DW SN74LS645DWG4 SN74LS645DWR SN74LS645N SN74LS645N3 SN74LS645NE4 SN74LS645NSR

制造商分类

Semiconductors> Logic> Buffer/Driver/Transceiver> Standard Transceiver