Datasheet Texas Instruments SN74LVT162240 — 数据表

制造商	Texas Instruments
系列	SN74LVT162240

具有三态输出的3.3V ABT 16位缓冲器/驱动器

数据表

PDF, 338 Kb, 修订版: A, 档案已发布: Nov 28, 2006

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	SN74LVT162240DGGR	SN74LVT162240DGVR	SN74LVT162240DL	SN74LVT162240DLG4
Lifecycle Status	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)
Manufacture's Sample Availability	No	No	No	No

	SN74LVT162240DGGR	SN74LVT162240DGVR	SN74LVT162240DL	SN74LVT162240DLG4
N	1	2	3	4
Pin	48	48	48	48
Package Type	DGG	DGV	DL	DL
Industry STD Term	TSSOP	TVSOP	SSOP	SSOP
JEDEC Code	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G
Package QTY	2000	2000	25	25
Carrier	LARGE T&R	LARGE T&R	TUBE	TUBE
Device Marking	LVT162240	LZ240	LVT162240	LVT162240
Width (mm)	6.1	4.4	7.49	7.49
Length (mm)	12.5	9.7	15.88	15.88
Thickness (mm)	1.15	1.05	2.59	2.59
Pitch (mm)	.5	.4	.635	.635
Max Height (mm)	1.2	1.2	2.79	2.79
Mechanical Data	下载	下载	下载	下载

Parameters / Models	SN74LVT162240DGGR	SN74LVT162240DGVR	SN74LVT162240DL	SN74LVT162240DLG4
Bits	16	16	16	16
F @ Nom Voltage(Max), Mhz	160	160	160	160
ICC @ Nom Voltage(Max), mA	0.005	0.005	0.005	0.005
Operating Temperature Range, C	-40 to 85	-40 to 85	-40 to 85	-40 to 85
Output Drive (IOL/IOH)(Max), mA	-12/12	-12/12	-12/12	-12/12
Package Group	TSSOP	TVSOP	SSOP	SSOP
Package Size: mm2:W x L, PKG	48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)	48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)	48SSOP: 164 mm2: 10.35 x 15.88(SSOP)	48SSOP: 164 mm2: 10.35 x 15.88(SSOP)
Rating	Catalog	Catalog	Catalog	Catalog
Schmitt Trigger	No	No	No	No
Technology Family	LVT	LVT	LVT	LVT
VCC(Max), V	3.6	3.6	3.6	3.6
VCC(Min), V	2.7	2.7	2.7	2.7
Voltage(Nom), V	3.3	3.3	3.3	3.3
tpd @ Nom Voltage(Max), ns	4.6	4.6	4.6	4.6

	SN74LVT162240DGGR	SN74LVT162240DGVR	SN74LVT162240DL	SN74LVT162240DLG4
RoHS	Compliant	Compliant	Compliant	Compliant

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LVT Family Characteristics (Rev. A)
PDF, 98 Kb, 修订版: A, 档案已发布: Mar 1, 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
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LVT-to-LVTH Conversion
PDF, 84 Kb, 档案已发布: Dec 8, 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

系列: SN74LVT162240 (4)