Datasheet Texas Instruments SN74LVT574 — 数据表

制造商	Texas Instruments
系列	SN74LVT574

具有三态输出的3.3V ABT八通道边沿触发D型触发器

数据表

PDF, 837 Kb, 修订版: D, 档案已发布: Jul 1, 1995

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	SN74LVT574DBLE	SN74LVT574DBR	SN74LVT574DW	SN74LVT574DWR	SN74LVT574NSR	SN74LVT574PWLE	SN74LVT574PWR
Lifecycle Status	Obsolete (Manufacturer has discontinued the production of the device)	Obsolete (Manufacturer has discontinued the production of the device)	NRND (Not recommended for new designs)	NRND (Not recommended for new designs)	Obsolete (Manufacturer has discontinued the production of the device)	Obsolete (Manufacturer has discontinued the production of the device)	NRND (Not recommended for new designs)
Manufacture's Sample Availability	No	No	No	No	No	No	No

	SN74LVT574DBLE	SN74LVT574DBR	SN74LVT574DW	SN74LVT574DWR	SN74LVT574NSR	SN74LVT574PWLE	SN74LVT574PWR
N	1	2	3	4	5	6	7
Pin	20	20	20	20	20	20	20
Package Type	DB	DB	DW	DW	NS	PW	PW
Industry STD Term	SSOP	SSOP	SOIC	SOIC	SOP	TSSOP	TSSOP
JEDEC Code	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G
Width (mm)	5.3	5.3	7.5	7.5	5.3	4.4	4.4
Length (mm)	7.2	7.2	12.8	12.8	12.6	6.5	6.5
Thickness (mm)	1.95	1.95	2.35	2.35	1.95	1	1
Pitch (mm)	.65	.65	1.27	1.27	1.27	.65	.65
Max Height (mm)	2	2	2.65	2.65	2	1.2	1.2
Mechanical Data	下载	下载	下载	下载	下载	下载	下载
Package QTY			25	2000			2000
Carrier			TUBE	LARGE T&R			LARGE T&R
Device Marking			LVT574	LVT574			LX574

	SN74LVT574DBLE	SN74LVT574DBR	SN74LVT574DW	SN74LVT574DWR	SN74LVT574NSR	SN74LVT574PWLE	SN74LVT574PWR
RoHS	Not Compliant	Not Compliant	Compliant	Compliant	Not Compliant	Not Compliant	Compliant
Pb Free	No	No	No	No

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LVT Family Characteristics (Rev. A)
PDF, 98 Kb, 修订版: A, 档案已发布: Mar 1, 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
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LVT-to-LVTH Conversion
PDF, 84 Kb, 档案已发布: Dec 8, 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

系列: SN74LVT574 (7)