Datasheet Texas Instruments SN74LVTH16373ZQLR — 数据表

制造商Texas Instruments
系列SN74LVTH16373
零件号SN74LVTH16373ZQLR
Datasheet Texas Instruments SN74LVTH16373ZQLR

具有三态输出的3.3V ABT 16位透明D类锁存器56-BGA MICROSTAR JUNIOR -40至85

数据表

SN54LVTH16373, SN74LVTH16373 datasheet
PDF, 944 Kb, 修订版: P, 档案已发布: Nov 1, 2006
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin56
Package TypeZQL
Industry STD TermBGA MICROSTAR JUNIOR
JEDEC CodeR-PBGA-N
Package QTY1000
CarrierLARGE T&R
Device MarkingLL373
Width (mm)4.5
Length (mm)7
Thickness (mm).75
Pitch (mm).65
Max Height (mm)1
Mechanical Data下载

参数化

3-State OutputYes
Bits16
F @ Nom Voltage(Max)160 Mhz
ICC @ Nom Voltage(Max)5 mA
Operating Temperature Range-40 to 85 C
Output Drive (IOL/IOH)(Max)64/-32 mA
Package GroupBGA MICROSTAR JUNIOR
Package Size: mm2:W x L56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR) PKG
RatingCatalog
Schmitt TriggerNo
Technology FamilyLVT
VCC(Max)3.6 V
VCC(Min)2.7 V
Voltage(Nom)3.3 V
tpd @ Nom Voltage(Max)3.8 ns

生态计划

RoHSCompliant

应用须知

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, 修订版: A, 档案已发布: Mar 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, 档案已发布: Dec 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
  • Bus-Hold Circuit
    PDF, 418 Kb, 档案已发布: Feb 5, 2001
    When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of

模型线

制造商分类

  • Semiconductors > Logic > Flip-Flop/Latch/Register > D-Type Latch