Datasheet Texas Instruments SN74LVTH182512-EP — 数据表

制造商	Texas Instruments
系列	SN74LVTH182512-EP

数据表

价格

状态

打包

参数化

Parameters / Models	8V182512IDGGREP	V62/04730-01XE
Bits	18	18
ICC @ Nom Voltage(Max), mA	24	24
Input Type	TTL	TTL
Operating Temperature Range, C	-40 to 85	-40 to 85
Output Drive (IOL/IOH)(Max), mA	64/-32	64/-32
Output Type	TTL	TTL
Package Group	TSSOP	TSSOP
Package Size: mm2:W x L, PKG	64TSSOP: 138 mm2: 8.1 x 17(TSSOP)	64TSSOP: 138 mm2: 8.1 x 17(TSSOP)
Rating	HiRel Enhanced Product	HiRel Enhanced Product
Technology Family	LVT	LVT
VCC(Max), V	3.6	3.6
VCC(Min), V	2.7	2.7
tpd @ Nom Voltage(Max), ns	5.7	5.7

生态计划

应用须知

• 下载
  LVT Family Characteristics (Rev. A)
  PDF, 98 Kb, 修订版: A, 档案已发布: Mar 1, 1998
  To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
• 下载
  LVT-to-LVTH Conversion
  PDF, 84 Kb, 档案已发布: Dec 8, 1998
  Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
• 下载
  16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
  PDF, 895 Kb, 修订版: B, 档案已发布: May 22, 2002
  TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
• 下载
  Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
  PDF, 105 Kb, 修订版: A, 档案已发布: Aug 1, 1997
  The spectrum of bus-interface devices with damping resistors or balanced/light output drive currently offered by various logic vendors is confusing at best. Inconsistencies in naming conventions and methods used for implementation make it difficult to identify the best solution for a given application. This report attempts to clarify the issue by looking at several vendors? approaches and discussi
• 下载
  Understanding Advanced Bus-Interface Products Design Guide
  PDF, 253 Kb, 档案已发布: May 1, 1996
• 下载
  Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
  PDF, 209 Kb, 档案已发布: May 10, 2002
  Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features

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制造商分类

• Semiconductors> Space & High Reliability> Logic Products> Specialty Logic Products> Boundary Scan (JTAG)