Datasheet Texas Instruments SN74S112AN — 数据表
制造商 | Texas Instruments |
系列 | SN74S112A |
零件号 | SN74S112AN |
具有清晰和预设16-PDIP的双路JK负边缘触发触发器0至70
数据表
Dual J-K Negative-Edge-Triggered Flip-Flops With Preset And Clear datasheet
PDF, 1.3 Mb, 档案已发布: Mar 1, 1988
从文件中提取
价格
状态
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
打包
Pin | 16 |
Package Type | N |
Industry STD Term | PDIP |
JEDEC Code | R-PDIP-T |
Package QTY | 25 |
Carrier | TUBE |
Device Marking | SN74S112AN |
Width (mm) | 6.35 |
Length (mm) | 19.3 |
Thickness (mm) | 3.9 |
Pitch (mm) | 2.54 |
Max Height (mm) | 5.08 |
Mechanical Data | 下载 |
参数化
Bits | 2 |
F @ Nom Voltage(Max) | 50 Mhz |
ICC @ Nom Voltage(Max) | 6 mA |
Output Drive (IOL/IOH)(Max) | -1/20 mA |
Package Group | PDIP |
Package Size: mm2:W x L | See datasheet (PDIP) PKG |
Rating | Catalog |
Schmitt Trigger | No |
Technology Family | S |
VCC(Max) | 5.25 V |
VCC(Min) | 4.75 V |
Voltage(Nom) | 5 V |
tpd @ Nom Voltage(Max) | 20 ns |
生态计划
RoHS | Compliant |
Pb Free | Yes |
模型线
系列: SN74S112A (3)
- SN74S112AD SN74S112AN SN74S112AN3
制造商分类
- Semiconductors > Logic > Flip-Flop/Latch/Register > J-K Flip-Flop