Datasheet Texas Instruments SN74V235-10PAG — 数据表

制造商Texas Instruments
系列SN74V235
零件号SN74V235-10PAG
Datasheet Texas Instruments SN74V235-10PAG

2048 x 18同步FIFO存储器64-TQFP 0至70

数据表

SN74V215, SN74V225, SN74V235, SN74V245 datasheet
PDF, 604 Kb, 修订版: E, 档案已发布: Sep 13, 2002
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin64
Package TypePAG
Industry STD TermTQFP
JEDEC CodeS-PQFP-G
Package QTY160
CarrierJEDEC TRAY (10+1)
Device MarkingV235-10
Width (mm)10
Length (mm)10
Thickness (mm)1
Pitch (mm).5
Max Height (mm)1.2
Mechanical Data下载

参数化

Package GroupTQFP
Package Size: mm2:W x L64TQFP: 144 mm2: 12 x 12(TQFP) PKG
Schmitt TriggerNo

生态计划

RoHSCompliant

应用须知

  • Designing With TI SN74V2x5 FIFO Programmable Flags
    PDF, 91 Kb, 档案已发布: May 14, 2001
    Many FIFOs being released today include programmable almost-empty and almost-full flags. TI?s newly released SN74V2x5 FIFOs are functionally equivalent to devices offered by IDT and are pin-for-pin compatible. The programmable flags can be used to provide interrupt signals when used in digital signal processor (DSP) and microprocessor applications. Additional configurations use the programmable fl
  • Power-Dissipation Calculations for TI FIFO Products (Rev. A)
    PDF, 106 Kb, 修订版: A, 档案已发布: Mar 1, 1996
    Low power consumption is a major advantage of TI FIFO products. Power calculations are required to meet design requirements for chip temperature and system power. This document assists component and system designers in evaluating power consumption for the ACT and ABT FIFO products. Two examples of power calculations, one for the SN74ACT3632 bi-directional CMOS FIFO and one for the BiCMOS SN74ABT36
  • Using TI FIFOs to Interface High-Speed Data Converters With TI TMS320 DSPs
    PDF, 249 Kb, 档案已发布: Jun 8, 2001
    Most high-speed data converters cannot be connected directly to a digital signal processor (DSP). The required transfer rates would tie up most of the DSP's I/O bandwidth. A FIFO is an appropriate solution for this problem because it can buffer a large block of data, and the DSP can read data from the FIFO in a burst mode. This is much more efficient compared to single reads for every sampled valu

模型线

系列: SN74V235 (3)

制造商分类

  • Semiconductors > Logic > Flip-Flop/Latch/Register > FIFO Register

其他名称:

SN74V23510PAG, SN74V235 10PAG