SN75LVDS84 www.ti.com SLLS270D – MARCH 1997 – REVISED NOVEMBER 2007 FLATLINK™ TRANSMITTERS
FEATURES 1 21:3 Data Channel Compression at up to 163
Million Bytes per Second Throughput Suited for SVGA, XGA, or SXGA Data
Transmission From Controller to Display With
Very Low EMI 21 Data Channels Plus Clock-In Low-Voltage
TTL and 3 Data Channels Plus Clock-Out
Low-Voltage Differential Operates From a Single 3.3-V Supply and
250 mW (Typ) 5-V Tolerant Data Inputs ESD Protection Exceeds 6 kV SN75LVDS84 Has Falling-Clock
Edge-Triggered Inputs Packaged in Thin Shrink Small-Outline
Package (TSSOP) With 20-Mil Terminal Pitch Consumes Less Than 1 mW When Disabled Wide Phase-Lock Input Frequency Range:
–
31 MHz to 68 MHz No External Components Required for PLL Outputs Meet or Exceed the Requirements of
ANSI EIA/TIA-644 Standard Improved Replacement for the DS90C561 DGG PACKAGE
(TOP VIEW) 23 D4
VCC
D5
D6
GND
D7
D8
VCC
D9
D10 …
