Datasheet Texas Instruments TLC2558 — 数据表

制造商Texas Instruments
系列TLC2558
Datasheet Texas Instruments TLC2558

12位,400 KSPS ADC,8通道掉电串行

数据表

5-V, 12-Bit, 400 KSPS, 4/8 Channel, Low Power, Serial A-D Converter datasheet
PDF, 1.5 Mb, 修订版: A, 档案已发布: Jul 1, 1999
从文件中提取

价格

状态

TLC2558CDWTLC2558CDWG4TLC2558IDWTLC2558IDWG4TLC2558IPWTLC2558IPWR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNo

打包

TLC2558CDWTLC2558CDWG4TLC2558IDWTLC2558IDWG4TLC2558IPWTLC2558IPWR
N123456
Pin202020202020
Package TypeDWDWDWDWPWPW
Industry STD TermSOICSOICSOICSOICTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY25252525702000
CarrierTUBETUBETUBETUBETUBELARGE T&R
Device MarkingTLC2558CTLC2558CTLC2558ITLC2558IY2558Y2558
Width (mm)7.57.57.57.54.44.4
Length (mm)12.812.812.812.86.56.5
Thickness (mm)2.352.352.352.3511
Pitch (mm)1.271.271.271.27.65.65
Max Height (mm)2.652.652.652.651.21.2
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参数化

Parameters / ModelsTLC2558CDW
TLC2558CDW
TLC2558CDWG4
TLC2558CDWG4
TLC2558IDW
TLC2558IDW
TLC2558IDWG4
TLC2558IDWG4
TLC2558IPW
TLC2558IPW
TLC2558IPWR
TLC2558IPWR
# Input Channels888888
Analog Voltage AVDD(Max), V5.55.55.55.55.55.5
Analog Voltage AVDD(Min), V4.54.54.54.54.54.5
ArchitectureSARSARSARSARSARSAR
Digital Supply(Max), V5.55.55.55.55.55.5
Digital Supply(Min), V4.54.54.54.54.54.5
INL(Max), +/-LSB111111
Input Range(Max), V5.55.55.55.55.55.5
Input TypePseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-Ended
Integrated FeaturesN/AN/AN/AN/AN/AN/A
InterfaceSPISPISPISPISPISPI
Multi-Channel ConfigurationMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexed
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Package GroupSOICSOICSOICSOICTSSOPTSSOP
Package Size: mm2:W x L, PKG20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)
Power Consumption(Typ), mW999999
RatingCatalogCatalogCatalogCatalogCatalogCatalog
Reference ModeExt,IntExt,IntExt,IntExt,IntExt,IntExt,Int
Resolution, Bits121212121212
SINAD, dB717171717171
SNR, dB717171717171
Sample Rate (max), SPS400kSPS400kSPS400kSPS400kSPS400kSPS400kSPS
Sample Rate(Max), MSPS0.40.40.40.40.40.4
THD(Typ), dB-82-82-82-82-82-82

生态计划

TLC2558CDWTLC2558CDWG4TLC2558IDWTLC2558IDWG4TLC2558IPWTLC2558IPWR
RoHSCompliantCompliantCompliantCompliantCompliantCompliant

应用须知

  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

模型线

制造商分类

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)