Datasheet Texas Instruments TLC2578 — 数据表

制造商Texas Instruments
系列TLC2578
Datasheet Texas Instruments TLC2578

串行输出,低功耗,内置转换时钟和8x FIFO,8通道

数据表

5-V Analog, 3-/5-V Digital, 14-/12-Bit, 200-KSPS, 4-/8-Channel Serial Analog-to- datasheet
PDF, 1.7 Mb, 修订版: C, 档案已发布: May 29, 2003
从文件中提取

价格

状态

TLC2578IDWTLC2578IDWG4TLC2578IPWTLC2578IPWG4TLC2578IPWRTLC2578IPWRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYesYesNoYesNo

打包

TLC2578IDWTLC2578IDWG4TLC2578IPWTLC2578IPWG4TLC2578IPWRTLC2578IPWRG4
N123456
Pin242424242424
Package TypeDWDWPWPWPWPW
Industry STD TermSOICSOICTSSOPTSSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY2525606020002000
CarrierTUBETUBETUBETUBELARGE T&RLARGE T&R
Device MarkingTLC2578ITLC2578IY2578Y2578Y2578Y2578
Width (mm)7.57.54.44.44.44.4
Length (mm)15.415.47.87.87.87.8
Thickness (mm)2.352.351111
Pitch (mm)1.271.27.65.65.65.65
Max Height (mm)2.652.651.21.21.21.2
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参数化

Parameters / ModelsTLC2578IDW
TLC2578IDW
TLC2578IDWG4
TLC2578IDWG4
TLC2578IPW
TLC2578IPW
TLC2578IPWG4
TLC2578IPWG4
TLC2578IPWR
TLC2578IPWR
TLC2578IPWRG4
TLC2578IPWRG4
# Input Channels888888
Analog Voltage AVDD(Max), V5.55.55.55.55.55.5
Analog Voltage AVDD(Min), V4.754.754.754.754.754.75
ArchitectureSARSARSARSARSARSAR
Digital Supply(Max), V5.55.55.55.55.55.5
Digital Supply(Min), V2.72.72.72.72.72.7
INL(Max), +/-LSB111111
Input Range(Max), V101010101010
Input Range(Min), V-10-10-10-10-10-10
Input TypePseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-Ended
Integrated FeaturesOscillatorOscillatorOscillatorOscillatorOscillatorOscillator
InterfaceSPISPISPISPISPISPI
Multi-Channel ConfigurationMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexed
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Package GroupSOICSOICTSSOPTSSOPTSSOPTSSOP
Package Size: mm2:W x L, PKG24SOIC: 160 mm2: 10.3 x 15.5(SOIC)24SOIC: 160 mm2: 10.3 x 15.5(SOIC)24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)
Power Consumption(Typ), mW292929292929
RatingCatalogCatalogCatalogCatalogCatalogCatalog
Reference ModeExtExtExtExtExtExt
Resolution, Bits121212121212
SINAD, dB727272727272
SNR, dB727272727272
Sample Rate (max), SPS200kSPS200kSPS200kSPS200kSPS200kSPS200kSPS
Sample Rate(Max), MSPS0.20.20.20.20.20.2
THD(Typ), dB-82-82-82-82-82-82

生态计划

TLC2578IDWTLC2578IDWG4TLC2578IPWTLC2578IPWG4TLC2578IPWRTLC2578IPWRG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliant

应用须知

  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

模型线

制造商分类

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)