Datasheet Texas Instruments TLC2652 — 数据表

制造商Texas Instruments
系列TLC2652
Datasheet Texas Instruments TLC2652

精密斩波稳定的运算放大器

数据表

TLC2652, TLC2652A, TLC2652Y Advanced LinCMOS Precision Chopper-Stabilized Op Amp datasheet
PDF, 1.1 Mb, 修订版: E, 档案已发布: Feb 9, 2005
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价格

状态

TLC2652C-14DTLC2652C-8DTLC2652C-8DG4TLC2652C-8DRTLC2652C-8DRG4TLC2652CNTLC2652CPTLC2652I-8DTLC2652I-8DG4TLC2652I-8DRTLC2652IPTLC2652Q-8DTLC2652Q-8DG4
Lifecycle StatusObsolete (Manufacturer has discontinued the production of the device)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNoNoNoNoNoYesYesYesNoNoYesYes

打包

TLC2652C-14DTLC2652C-8DTLC2652C-8DG4TLC2652C-8DRTLC2652C-8DRG4TLC2652CNTLC2652CPTLC2652I-8DTLC2652I-8DG4TLC2652I-8DRTLC2652IPTLC2652Q-8DTLC2652Q-8DG4
N12345678910111213
Pin148888148888888
Package TypeDDDDDNPDDDPDD
Industry STD TermSOICSOICSOICSOICSOICPDIPPDIPSOICSOICSOICPDIPSOICSOIC
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-GR-PDIP-TR-PDSO-GR-PDSO-G
Width (mm)3.913.913.913.913.916.356.353.913.913.916.353.913.91
Length (mm)8.654.94.94.94.919.39.814.94.94.99.814.94.9
Thickness (mm)1.581.581.581.581.583.93.91.581.581.583.91.581.58
Pitch (mm)1.271.271.271.271.272.542.541.271.271.272.541.271.27
Max Height (mm)1.751.751.751.751.755.085.081.751.751.755.081.751.75
Mechanical Data下载下载下载下载下载下载下载下载下载下载下载下载下载
Package QTY7525002500255075752500507575
CarrierTUBELARGE T&RLARGE T&RTUBETUBETUBETUBELARGE T&RTUBESMALL T&RSMALL T&R
Device Marking2652C2652C2652CTLC2652CNTLC2652CP2652I2652I2652ITLC2652IPT2652QT2652Q

参数化

Parameters / ModelsTLC2652C-14D
TLC2652C-14D
TLC2652C-8D
TLC2652C-8D
TLC2652C-8DG4
TLC2652C-8DG4
TLC2652C-8DR
TLC2652C-8DR
TLC2652C-8DRG4
TLC2652C-8DRG4
TLC2652CN
TLC2652CN
TLC2652CP
TLC2652CP
TLC2652I-8D
TLC2652I-8D
TLC2652I-8DG4
TLC2652I-8DG4
TLC2652I-8DR
TLC2652I-8DR
TLC2652IP
TLC2652IP
TLC2652Q-8D
TLC2652Q-8D
TLC2652Q-8DG4
TLC2652Q-8DG4
Additional FeaturesZero DriftZero DriftZero DriftZero DriftZero DriftZero DriftZero DriftZero DriftZero DriftZero DriftZero DriftZero DriftZero Drift
Approx. Price (US$)2.54 | 1ku2.55 | 1ku
ArchitectureCMOSCMOSCMOSCMOSCMOSCMOSCMOSCMOSCMOSCMOSCMOSCMOSCMOS
CMRR(Min), dB120120120120120120120120120120120
CMRR(Min)(dB)120120
CMRR(Typ), dB140140140140140140140140140140140
CMRR(Typ)(dB)140140
GBW(Typ), MHz1.91.91.91.91.91.91.91.91.91.91.9
GBW(Typ)(MHz)1.91.9
Input Bias Current(Max), pA6060606060606060606060
Input Bias Current(Max)(pA)6060
Iq per channel(Max), mA2.42.42.42.42.42.42.42.42.42.42.4
Iq per channel(Max)(mA)2.42.4
Iq per channel(Typ), mA1.51.51.51.51.51.51.51.51.51.51.5
Iq per channel(Typ)(mA)1.51.5
Number of Channels11111111111
Number of Channels(#)11
Offset Drift(Typ), uV/C0.010.010.010.010.010.010.010.010.010.010.01
Offset Drift(Typ)(uV/C)0.010.01
Operating Temperature Range, C-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125
Operating Temperature Range(C)-40 to 125-40 to 125
Output Current(Typ), mA33333333333
Output Current(Typ)(mA)33
Package GroupSOICSOICSOICSOICSOICPDIPPDIPSOICSOICSOICPDIPSOICSOIC
Package Size: mm2:W x L, PKG8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)See datasheet (PDIP)See datasheet (PDIP)8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)See datasheet (PDIP)8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)
Package Size: mm2:W x L (PKG)See datasheet (PDIP)See datasheet (PDIP)
Rail-to-RailIn to V-
Out
In to V-,OutIn to V-
Out
In to V-,OutIn to V-,OutIn to V-,OutIn to V-,OutIn to V-,OutIn to V-,OutIn to V-,OutIn to V-,OutIn to V-,OutIn to V-,Out
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Slew Rate(Typ), V/us2.82.82.82.82.82.82.82.82.82.82.8
Slew Rate(Typ)(V/us)2.82.8
Total Supply Voltage(Max), +5V=5, +/-5V=101616161616161616161616
Total Supply Voltage(Max)(+5V=5, +/-5V=10)1616
Total Supply Voltage(Min), +5V=5, +/-5V=103.83.83.83.83.83.83.83.83.83.83.8
Total Supply Voltage(Min)(+5V=5, +/-5V=10)3.83.8
Vn at 1kHz(Typ), nV/rtHz2323232323232323232323
Vn at 1kHz(Typ)(nV/rtHz)2323
Vos (Offset Voltage @ 25C)(Max), mV0.0030.0030.0030.0030.0030.0030.0030.0030.0030.0030.003
Vos (Offset Voltage @ 25C)(Max)(mV)0.0030.003

生态计划

TLC2652C-14DTLC2652C-8DTLC2652C-8DG4TLC2652C-8DRTLC2652C-8DRG4TLC2652CNTLC2652CPTLC2652I-8DTLC2652I-8DG4TLC2652I-8DRTLC2652IPTLC2652Q-8DTLC2652Q-8DG4
RoHSNot CompliantCompliantNot CompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant
Pb FreeYesNoYesYesNo

应用须知

  • Choosing an ADC and Op Amp for Minimum Offset
    PDF, 72 Kb, 档案已发布: Oct 28, 1999
    Designing a mixed-signal circuit containing analog and digital components can be a challenge to the development engineer. Requirements such as a low single-polarity supply voltage and a high degree of precision may conflict, and make the choice of components and the best circuit design difficult. This report discusses problems that arise in using operational amplifiers (op amps) for signal conditi
  • AB-174: Getting the Full Potential from your ADC (Rev. A)
    PDF, 72 Kb, 修订版: A, 档案已发布: Jun 28, 2002
    Many of today?s high-resolution ADCs (Analog-to-Digital Converters) are operating from a single supply and use fully differential inputs. This can be a problem for single-ended signals that are bipolar relative to common. This article illustrates circuit configurations that preserve the full-scale input range by using modern features, such as Programmable Gain Amplifiers (PGAs) and internal voltag

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制造商分类

  • Semiconductors> Amplifiers> Operational Amplifiers (Op Amps)> Precision Op Amps