Datasheet Texas Instruments TLC3578 — 数据表

制造商Texas Instruments
系列TLC3578
Datasheet Texas Instruments TLC3578

串行输出,低功耗,内置转换时钟和8x FIFO,8通道

数据表

5-V Analog, 3-/5-V Digital, 14-/12-Bit, 200-KSPS, 4-/8-Channel Serial Analog-to- datasheet
PDF, 1.7 Mb, 修订版: C, 档案已发布: May 29, 2003
从文件中提取

价格

状态

TLC3578IDWTLC3578IDWG4TLC3578IDWRTLC3578IPWTLC3578IPWG4TLC3578IPWR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYesYesNoNoNo

打包

TLC3578IDWTLC3578IDWG4TLC3578IDWRTLC3578IPWTLC3578IPWG4TLC3578IPWR
N123456
Pin242424242424
Package TypeDWDWDWPWPWPW
Industry STD TermSOICSOICSOICTSSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY2525200060602000
CarrierTUBETUBELARGE T&RTUBETUBELARGE T&R
Device MarkingTLC3578ITLC3578ITLC3578IY3578Y3578Y3578
Width (mm)7.57.57.54.44.44.4
Length (mm)15.415.415.47.87.87.8
Thickness (mm)2.352.352.35111
Pitch (mm)1.271.271.27.65.65.65
Max Height (mm)2.652.652.651.21.21.2
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参数化

Parameters / ModelsTLC3578IDW
TLC3578IDW
TLC3578IDWG4
TLC3578IDWG4
TLC3578IDWR
TLC3578IDWR
TLC3578IPW
TLC3578IPW
TLC3578IPWG4
TLC3578IPWG4
TLC3578IPWR
TLC3578IPWR
# Input Channels888888
Analog Voltage AVDD(Max), V5.55.55.55.55.55.5
Analog Voltage AVDD(Min), V4.754.754.754.754.754.75
ArchitectureSARSARSARSARSARSAR
Digital Supply(Max), V5.55.55.55.55.55.5
Digital Supply(Min), V2.72.72.72.72.72.7
INL(Max), +/-LSB1.51.51.51.51.51.5
Input Range(Max), V101010101010
Input Range(Min), V-10-10-10-10-10-10
Input TypePseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-Ended
Integrated FeaturesOscillatorOscillatorOscillatorOscillatorOscillatorOscillator
InterfaceSPISPISPISPISPISPI
Multi-Channel ConfigurationMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexed
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Package GroupSOICSOICSOICTSSOPTSSOPTSSOP
Package Size: mm2:W x L, PKG24SOIC: 160 mm2: 10.3 x 15.5(SOIC)24SOIC: 160 mm2: 10.3 x 15.5(SOIC)24SOIC: 160 mm2: 10.3 x 15.5(SOIC)24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)
Power Consumption(Typ), mW292929292929
RatingCatalogCatalogCatalogCatalogCatalogCatalog
Reference ModeExtExtExtExtExtExt
Resolution, Bits141414141414
SINAD, dB797979797979
SNR, dB808080808080
Sample Rate (max), SPS200kSPS200kSPS200kSPS200kSPS200kSPS200kSPS
Sample Rate(Max), MSPS0.20.20.20.20.20.2
THD(Typ), dB-82-82-82-82-82-82

生态计划

TLC3578IDWTLC3578IDWG4TLC3578IDWRTLC3578IPWTLC3578IPWG4TLC3578IPWR
RoHSCompliantCompliantCompliantCompliantCompliantCompliant

应用须知

  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

模型线

制造商分类

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)