Datasheet Texas Instruments TLC4545 — 数据表

制造商Texas Instruments
系列TLC4545
Datasheet Texas Instruments TLC4545

16位200KSPS ADC串行输出,自动PWRDN,伪差分输入

数据表

5-V, Low Power- 16-/14-Bit 100-200 KSPS Serial ADC with Auto-Power Down datasheet
PDF, 1.0 Mb, 档案已发布: Jul 10, 2000
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价格

状态

TLC4545IDTLC4545IDG4TLC4545IDGKTLC4545IDGKG4TLC4545IDR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYesYesNoNo

打包

TLC4545IDTLC4545IDG4TLC4545IDGKTLC4545IDGKG4TLC4545IDR
N12345
Pin88888
Package TypeDDDGKDGKD
Industry STD TermSOICSOICVSSOPVSSOPSOIC
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY757580802500
CarrierTUBETUBETUBETUBELARGE T&R
Device Marking4545I4545IAMEAME4545I
Width (mm)3.913.91333.91
Length (mm)4.94.9334.9
Thickness (mm)1.581.58.97.971.58
Pitch (mm)1.271.27.65.651.27
Max Height (mm)1.751.751.071.071.75
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参数化

Parameters / ModelsTLC4545ID
TLC4545ID
TLC4545IDG4
TLC4545IDG4
TLC4545IDGK
TLC4545IDGK
TLC4545IDGKG4
TLC4545IDGKG4
TLC4545IDR
TLC4545IDR
# Input Channels11111
Analog Voltage AVDD(Max), V5.55.55.55.55.5
Analog Voltage AVDD(Min), V4.54.54.54.54.5
ArchitectureSARSARSARSARSAR
Digital Supply(Max), V5.55.55.55.55.5
Digital Supply(Min), V4.54.54.54.54.5
INL(Max), +/-LSB2.52.52.52.52.5
Input Range(Max), V5.55.55.55.55.5
Input TypePseudo-DifferentialPseudo-DifferentialPseudo-DifferentialPseudo-DifferentialPseudo-Differential
Integrated FeaturesOscillatorOscillatorOscillatorOscillatorOscillator
InterfaceSPISPISPISPISPI
Multi-Channel ConfigurationN/AN/AN/AN/AN/A
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Package GroupSOICSOICVSSOPVSSOPSOIC
Package Size: mm2:W x L, PKG8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)8VSSOP: 15 mm2: 4.9 x 3(VSSOP)8VSSOP: 15 mm2: 4.9 x 3(VSSOP)8SOIC: 29 mm2: 6 x 4.9(SOIC)
Power Consumption(Typ), mW16.516.516.516.516.5
RatingCatalogCatalogCatalogCatalogCatalog
Reference ModeExtExtExtExtExt
Resolution, Bits1616161616
SINAD, dB84.584.584.584.584.5
SNR, dB8585858585
Sample Rate (max), SPS200kSPS200kSPS200kSPS200kSPS200kSPS
Sample Rate(Max), MSPS0.20.20.20.20.2
THD(Typ), dB-94-94-94-94-94

生态计划

TLC4545IDTLC4545IDG4TLC4545IDGKTLC4545IDGKG4TLC4545IDR
RoHSCompliantCompliantCompliantCompliantCompliant

应用须知

  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

模型线

制造商分类

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)