Datasheet Texas Instruments TLE2081A — 数据表

制造商	Texas Instruments
系列	TLE2081A

Excalibur高速JFET输入运算放大器

数据表

PDF, 2.0 Mb, 修订版: B, 档案已发布: Jun 14, 2001

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	TLE2081ACD	TLE2081ACDG4	TLE2081ACDR	TLE2081ACDRG4	TLE2081ACP	TLE2081AID	TLE2081AIP
Lifecycle Status	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)
Manufacture's Sample Availability	No	No	No	No	No	No	No

	TLE2081ACD	TLE2081ACDG4	TLE2081ACDR	TLE2081ACDRG4	TLE2081ACP	TLE2081AID	TLE2081AIP
N	1	2	3	4	5	6	7
Pin	8	8	8	8	8	8	8
Package Type	D	D	D	D	P	D	P
Industry STD Term	SOIC	SOIC	SOIC	SOIC	PDIP	SOIC	PDIP
JEDEC Code	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDIP-T	R-PDSO-G	R-PDIP-T
Package QTY	75	75	2500	2500	50	75	50
Carrier	TUBE	TUBE	LARGE T&R	LARGE T&R	TUBE	TUBE	TUBE
Device Marking	2081AC	2081AC	2081AC	2081AC	TLE2081AC	2081AI	TLE2081AI
Width (mm)	3.91	3.91	3.91	3.91	6.35	3.91	6.35
Length (mm)	4.9	4.9	4.9	4.9	9.81	4.9	9.81
Thickness (mm)	1.58	1.58	1.58	1.58	3.9	1.58	3.9
Pitch (mm)	1.27	1.27	1.27	1.27	2.54	1.27	2.54
Max Height (mm)	1.75	1.75	1.75	1.75	5.08	1.75	5.08
Mechanical Data	下载	下载	下载	下载	下载	下载	下载

Parameters / Models	TLE2081ACD	TLE2081ACDG4	TLE2081ACDR	TLE2081ACDRG4	TLE2081ACP	TLE2081AID	TLE2081AIP
Additional Features	N/A	N/A	N/A	N/A	N/A	N/A	N/A
Architecture	FET	FET	FET	FET	FET	FET	FET
CMRR(Min), dB	80	80	80	80	80	80	80
CMRR(Typ), dB	98	98	98	98	98	98	98
GBW(Typ), MHz	10	10	10	10	10	10	10
Input Bias Current(Max), pA	175	175	175	175	175	175	175
Iq per channel(Max), mA	2.2	2.2	2.2	2.2	2.2	2.2	2.2
Iq per channel(Typ), mA	1.7	1.7	1.7	1.7	1.7	1.7	1.7
Number of Channels	1	1	1	1	1	1	1
Offset Drift(Typ), uV/C	3.2	3.2	3.2	3.2	3.2	3.2	3.2
Operating Temperature Range, C	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70
Output Current(Typ), mA	30	30	30	30	30	30	30
Package Group	SOIC	SOIC	SOIC	SOIC	PDIP	SOIC	PDIP
Package Size: mm2:W x L, PKG	8SOIC: 29 mm2: 6 x 4.9(SOIC)	8SOIC: 29 mm2: 6 x 4.9(SOIC)	8SOIC: 29 mm2: 6 x 4.9(SOIC)	8SOIC: 29 mm2: 6 x 4.9(SOIC)	See datasheet (PDIP)	8SOIC: 29 mm2: 6 x 4.9(SOIC)	See datasheet (PDIP)
Rail-to-Rail	In to V+	In to V+	In to V+	In to V+	In to V+	In to V+	In to V+
Rating	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog
Slew Rate(Typ), V/us	40	40	40	40	40	40	40
Total Supply Voltage(Max), +5V=5, +/-5V=10	38	38	38	38	38	38	38
Total Supply Voltage(Min), +5V=5, +/-5V=10	4.5	4.5	4.5	4.5	4.5	4.5	4.5
Vn at 1kHz(Typ), nV/rtHz	12	12	12	12	12	12	12
Vos (Offset Voltage @ 25C)(Max), mV	3	3	3	3	3	3	3

	TLE2081ACD	TLE2081ACDG4	TLE2081ACDR	TLE2081ACDRG4	TLE2081ACP	TLE2081AID	TLE2081AIP
RoHS	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant
Pb Free	Yes	Yes

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系列: TLE2081A (7)