Datasheet Texas Instruments TLV1572 — 数据表

制造商	Texas Instruments
系列	TLV1572

10位1.25MSPS ADC单通道，DSP /（Q）SPI IF，S＆H，超低功耗，自动掉电

数据表

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PDF, 732 Kb, 修订版: A, 档案已发布: Sep 4, 1998

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价格

状态

	TLV1572CD	TLV1572CDG4	TLV1572CDR	TLV1572CDRG4	TLV1572ID	TLV1572IDG4	TLV1572IDR	TLV1572IDRG4
Lifecycle Status	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)
Manufacture's Sample Availability	Yes	Yes	No	No	No	No	Yes	Yes

打包

	TLV1572CD	TLV1572CDG4	TLV1572CDR	TLV1572CDRG4	TLV1572ID	TLV1572IDG4	TLV1572IDR	TLV1572IDRG4
N	1	2	3	4	5	6	7	8
Pin	8	8	8	8	8	8	8	8
Package Type	D	D	D	D	D	D	D	D
Industry STD Term	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC
JEDEC Code	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G
Package QTY	75	75	2500	2500	75	75	2500	2500
Carrier	TUBE	TUBE	LARGE T&R	LARGE T&R	TUBE	TUBE	LARGE T&R	LARGE T&R
Device Marking	V1572C	V1572C	V1572C	V1572C	V1572I	V1572I	V1572I	V1572I
Width (mm)	3.91	3.91	3.91	3.91	3.91	3.91	3.91	3.91
Length (mm)	4.9	4.9	4.9	4.9	4.9	4.9	4.9	4.9
Thickness (mm)	1.58	1.58	1.58	1.58	1.58	1.58	1.58	1.58
Pitch (mm)	1.27	1.27	1.27	1.27	1.27	1.27	1.27	1.27
Max Height (mm)	1.75	1.75	1.75	1.75	1.75	1.75	1.75	1.75
Mechanical Data	下载	下载	下载	下载	下载	下载	下载	下载

参数化

Parameters / Models	TLV1572CD	TLV1572CDG4	TLV1572CDR	TLV1572CDRG4	TLV1572ID	TLV1572IDG4	TLV1572IDR	TLV1572IDRG4
# Input Channels	1	1	1	1	1	1	1	1
Analog Voltage AVDD(Max), V	5.5	5.5	5.5	5.5	5.5	5.5	5.5	5.5
Analog Voltage AVDD(Min), V	2.7	2.7	2.7	2.7	2.7	2.7	2.7	2.7
Architecture	SAR	SAR	SAR	SAR	SAR	SAR	SAR	SAR
Digital Supply(Max), V	5.5	5.5	5.5	5.5	5.5	5.5	5.5	5.5
Digital Supply(Min), V	2.7	2.7	2.7	2.7	2.7	2.7	2.7	2.7
INL(Max), +/-LSB	1	1	1	1	1	1	1	1
Input Range(Max), V	5.5	5.5	5.5	5.5	5.5	5.5	5.5	5.5
Input Type	Single-Ended	Single-Ended	Single-Ended	Single-Ended	Single-Ended	Single-Ended	Single-Ended	Single-Ended
Integrated Features	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A
Interface	SPI	SPI	SPI	SPI	SPI	SPI	SPI	SPI
Multi-Channel Configuration	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A
Operating Temperature Range, C	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70
Package Group	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC
Package Size: mm2:W x L, PKG	8SOIC: 29 mm2: 6 x 4.9(SOIC)	8SOIC: 29 mm2: 6 x 4.9(SOIC)	8SOIC: 29 mm2: 6 x 4.9(SOIC)	8SOIC: 29 mm2: 6 x 4.9(SOIC)	8SOIC: 29 mm2: 6 x 4.9(SOIC)	8SOIC: 29 mm2: 6 x 4.9(SOIC)	8SOIC: 29 mm2: 6 x 4.9(SOIC)	8SOIC: 29 mm2: 6 x 4.9(SOIC)
Power Consumption(Typ), mW	8	8	8	8	8	8	8	8
Rating	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog
Reference Mode	Ext	Ext	Ext	Ext	Ext	Ext	Ext	Ext
Resolution, Bits	10	10	10	10	10	10	10	10
SINAD, dB	60	60	60	60	60	60	60	60
SNR, dB	62	62	62	62	62	62	62	62
Sample Rate (max), SPS	1.25MSPS	1.25MSPS	1.25MSPS	1.25MSPS	1.25MSPS	1.25MSPS	1.25MSPS	1.25MSPS
Sample Rate(Max), MSPS	1.25	1.25	1.25	1.25	1.25	1.25	1.25	1.25
THD(Typ), dB	-60	-60	-60	-60	-60	-60	-60	-60

生态计划

	TLV1572CD	TLV1572CDG4	TLV1572CDR	TLV1572CDRG4	TLV1572ID	TLV1572IDG4	TLV1572IDR	TLV1572IDRG4
RoHS	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant

应用须知

下载
Low-power data acquisition sub-system using the TI TLV1572
PDF, 230 Kb, 档案已发布: Mar 11, 2005
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Interfacing the TLV1572 Analog-to-Digital Converter to the TMS320C203 DSP (Rev. B)
PDF, 135 Kb, 修订版: B, 档案已发布: May 11, 1999
This application report presents a hardware solution for interfacing the TLV1572 10-bit, 1.25 MSPS (Mega Samples Per Second), successive low-power analog-to-digital converter (ADC) to the TMS320C203 16-bit fixed-point digital signal processor (DSP). In addition, a C-callable interface program is shown which supports the data transfer between ADC and DSP.
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Low-Power Signal Conditioning For A Pressure Sensor (Rev. A)
PDF, 469 Kb, 修订版: A, 档案已发布: May 18, 2015
下载
Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
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Determining Minimum Acquisition Times for SAR ADCs, part 2
PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

模型线

系列: TLV1572 (8)

TLV1572CD TLV1572CDG4 TLV1572CDR TLV1572CDRG4 TLV1572ID TLV1572IDG4 TLV1572IDR TLV1572IDRG4

制造商分类

Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)