Datasheet Texas Instruments TLV5618A — 数据表
制造商 | Texas Instruments |
系列 | TLV5618A |
12位,2.5us双路DAC,串行输入,可编程的建立时间,Q temp
数据表
2.7-V To 5.5-V Low-Power Dual 12-Bit D/A Converter With Power Down datasheet
PDF, 1.0 Mb, 修订版: H, 档案已发布: Jul 9, 2002
从文件中提取
价格
状态
TLV5618ACD | TLV5618ACDG4 | TLV5618ACDR | TLV5618ACDRG4 | TLV5618ACP | TLV5618ACPE4 | TLV5618AID | TLV5618AIDG4 | TLV5618AIDR | TLV5618AIDRG4 | TLV5618AIP | TLV5618AIPE4 | TLV5618AQD | TLV5618AQDG4 | TLV5618AQDR | TLV5618AQDRG4 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | Yes | No | Yes | No | No | Yes | No | No | No | No | No | Yes | Yes | No | Yes |
打包
TLV5618ACD | TLV5618ACDG4 | TLV5618ACDR | TLV5618ACDRG4 | TLV5618ACP | TLV5618ACPE4 | TLV5618AID | TLV5618AIDG4 | TLV5618AIDR | TLV5618AIDRG4 | TLV5618AIP | TLV5618AIPE4 | TLV5618AQD | TLV5618AQDG4 | TLV5618AQDR | TLV5618AQDRG4 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 |
Pin | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
Package Type | D | D | D | D | P | P | D | D | D | D | P | P | D | D | D | D |
Industry STD Term | SOIC | SOIC | SOIC | SOIC | PDIP | PDIP | SOIC | SOIC | SOIC | SOIC | PDIP | PDIP | SOIC | SOIC | SOIC | SOIC |
JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDIP-T | R-PDIP-T | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDIP-T | R-PDIP-T | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
Package QTY | 75 | 75 | 2500 | 2500 | 50 | 50 | 75 | 75 | 2500 | 2500 | 50 | 50 | 75 | 75 | 2500 | 2500 |
Carrier | TUBE | TUBE | LARGE T&R | LARGE T&R | TUBE | TUBE | TUBE | TUBE | LARGE T&R | LARGE T&R | TUBE | TUBE | SMALL T&R | SMALL T&R | LARGE T&R | LARGE T&R |
Device Marking | TV5618 | TV5618 | TV5618 | TV5618 | TLV5618AC | TLV5618AC | TY5618 | TY5618 | TY5618 | TY5618 | TLV5618AI | TLV5618AI | V5618A | V5618A | V5618A | V5618A |
Width (mm) | 3.91 | 3.91 | 3.91 | 3.91 | 6.35 | 6.35 | 3.91 | 3.91 | 3.91 | 3.91 | 6.35 | 6.35 | 3.91 | 3.91 | 3.91 | 3.91 |
Length (mm) | 4.9 | 4.9 | 4.9 | 4.9 | 9.81 | 9.81 | 4.9 | 4.9 | 4.9 | 4.9 | 9.81 | 9.81 | 4.9 | 4.9 | 4.9 | 4.9 |
Thickness (mm) | 1.58 | 1.58 | 1.58 | 1.58 | 3.9 | 3.9 | 1.58 | 1.58 | 1.58 | 1.58 | 3.9 | 3.9 | 1.58 | 1.58 | 1.58 | 1.58 |
Pitch (mm) | 1.27 | 1.27 | 1.27 | 1.27 | 2.54 | 2.54 | 1.27 | 1.27 | 1.27 | 1.27 | 2.54 | 2.54 | 1.27 | 1.27 | 1.27 | 1.27 |
Max Height (mm) | 1.75 | 1.75 | 1.75 | 1.75 | 5.08 | 5.08 | 1.75 | 1.75 | 1.75 | 1.75 | 5.08 | 5.08 | 1.75 | 1.75 | 1.75 | 1.75 |
Mechanical Data | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 |
参数化
Parameters / Models | TLV5618ACD | TLV5618ACDG4 | TLV5618ACDR | TLV5618ACDRG4 | TLV5618ACP | TLV5618ACPE4 | TLV5618AID | TLV5618AIDG4 | TLV5618AIDR | TLV5618AIDRG4 | TLV5618AIP | TLV5618AIPE4 | TLV5618AQD | TLV5618AQDG4 | TLV5618AQDR | TLV5618AQDRG4 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Code to Code Glitch(Typ), nV-sec | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 |
DAC Architecture | String | String | String | String | String | String | String | String | String | String | String | String | String | String | String | String |
DAC Channels | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 |
Gain Error(Max), %FSR | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 |
INL(Max), +/-LSB | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 |
Interface | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI |
Offset Error(Max), % | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A |
Operating Temperature Range, C | -40 to 125,-40 to 85,0 to 70 | -40 to 125,-40 to 85,0 to 70 | -40 to 125,-40 to 85,0 to 70 | -40 to 125,-40 to 85,0 to 70 | -40 to 125,-40 to 85,0 to 70 | -40 to 125,-40 to 85,0 to 70 | -40 to 125,-40 to 85,0 to 70 | -40 to 125,-40 to 85,0 to 70 | -40 to 125,-40 to 85,0 to 70 | -40 to 125,-40 to 85,0 to 70 | -40 to 125,-40 to 85,0 to 70 | -40 to 125,-40 to 85,0 to 70 | -40 to 125,-40 to 85,0 to 70 | -40 to 125,-40 to 85,0 to 70 | -40 to 125,-40 to 85,0 to 70 | -40 to 125,-40 to 85,0 to 70 |
Output Range Max., mA/V | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 |
Output Type | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage |
Package Group | SOIC | SOIC | SOIC | SOIC | PDIP | PDIP | SOIC | SOIC | SOIC | SOIC | PDIP | PDIP | SOIC | SOIC | SOIC | SOIC |
Package Size: mm2:W x L, PKG | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | See datasheet (PDIP) | See datasheet (PDIP) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | See datasheet (PDIP) | See datasheet (PDIP) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) |
Power Consumption(Typ), mW | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 |
Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
Reference: Type | Ext | Ext | Ext | Ext | Ext | Ext | Ext | Ext | Ext | Ext | Ext | Ext | Ext | Ext | Ext | Ext |
Resolution, Bits | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 |
Sample / Update Rate, MSPS | 0.093 | 0.093 | 0.093 | 0.093 | 0.093 | 0.093 | 0.093 | 0.093 | 0.093 | 0.093 | 0.093 | 0.093 | 0.093 | 0.093 | 0.093 | 0.093 |
Settling Time, µs | 2.5 | 2.5 | 2.5 | 2.5 | 2.5 | 2.5 | 2.5 | 2.5 | 2.5 | 2.5 | 2.5 | 2.5 | 2.5 | 2.5 | 2.5 | 2.5 |
Special Features | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A |
Zero Code Error(Typ), mV | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 |
生态计划
TLV5618ACD | TLV5618ACDG4 | TLV5618ACDR | TLV5618ACDRG4 | TLV5618ACP | TLV5618ACPE4 | TLV5618AID | TLV5618AIDG4 | TLV5618AIDR | TLV5618AIDRG4 | TLV5618AIP | TLV5618AIPE4 | TLV5618AQD | TLV5618AQDG4 | TLV5618AQDR | TLV5618AQDRG4 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Pb Free | Yes | Yes | Yes | Yes |
应用须知
- Interfacing the TLV2541 ADC and the TLV5618A DAC to the TMS320C31 DSPPDF, 352 Kb, 档案已发布: Nov 13, 2000
This application report is written to help design engineers or technicians implement a simple data acquisition system using serial analog-to-digital converters (ADCs) and digital-to-analog (DACs) from Texas Instruments. A hardware and software solution for interfacing the TLV2541 ADC and the TLV5618A DAC to the TMS320C31 DSP with the use of the TMS320C3x DSP starter kit (DSK) is presented here.
模型线
系列: TLV5618A (16)
制造商分类
- Semiconductors> Data Converters> Digital-to-Analog Converters (DACs)> Precision DACs (=<10MSPS)