Datasheet Texas Instruments TLV5633 — 数据表
| 制造商 | Texas Instruments |
| 系列 | TLV5633 |
12位DAC并行电压输出，可编程Int参考建立时间，Pwr消耗，8位uC Comp Int
数据表
2.7 V to 5.5 V Low Power 12-Bit D/A Converters w/Internal Refer & Power Down datasheet
PDF, 584 Kb, 修订版: C, 档案已发布: Sep 28, 2006
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价格
状态
| TLV5633CDW | TLV5633CDWG4 | TLV5633CPW | TLV5633CPWR | TLV5633CPWRG4 | TLV5633IDW | TLV5633IPW | |
|---|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Obsolete (Manufacturer has discontinued the production of the device) | Obsolete (Manufacturer has discontinued the production of the device) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | No | No | No | No | No |
打包
| TLV5633CDW | TLV5633CDWG4 | TLV5633CPW | TLV5633CPWR | TLV5633CPWRG4 | TLV5633IDW | TLV5633IPW | |
|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
| Pin | 20 | 20 | 20 | 20 | 20 | 20 | 20 |
| Package Type | DW | DW | PW | PW | PW | DW | PW |
| Industry STD Term | SOIC | SOIC | TSSOP | TSSOP | TSSOP | SOIC | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 25 | 25 | 70 | 25 | 70 | ||
| Carrier | TUBE | TUBE | TUBE | TUBE | TUBE | ||
| Device Marking | TLV5633C | TLV5633C | TV5633 | TV5633 | TLV5633I | TY5633 | |
| Width (mm) | 7.5 | 7.5 | 4.4 | 4.4 | 4.4 | 7.5 | 4.4 |
| Length (mm) | 12.8 | 12.8 | 6.5 | 6.5 | 6.5 | 12.8 | 6.5 |
| Thickness (mm) | 2.35 | 2.35 | 1 | 1 | 1 | 2.35 | 1 |
| Pitch (mm) | 1.27 | 1.27 | .65 | .65 | .65 | 1.27 | .65 |
| Max Height (mm) | 2.65 | 2.65 | 1.2 | 1.2 | 1.2 | 2.65 | 1.2 |
| Mechanical Data | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 |
参数化
| Parameters / Models | TLV5633CDW | TLV5633CDWG4 | TLV5633CPW | TLV5633CPWR | TLV5633CPWRG4 | TLV5633IDW | TLV5633IPW |
|---|---|---|---|---|---|---|---|
| Approx. Price (US$) | 5.58 | 1ku | 5.58 | 1ku | |||||
| Architecture | String | ||||||
| Code to Code Glitch(Typ), nV-sec | 5 | 5 | 5 | 5 | 5 | ||
| Code to Code Glitch(Typ)(nV-sec) | 5 | 5 | |||||
| DAC Architecture | String | String | String | String | String | String | |
| DAC Channels | 1 | 1 | 1 | 1 | 1 | ||
| DAC: Channels | 1 | 1 | |||||
| Gain Error(Max), %FSR | 0.3 | 0.3 | 0.3 | 0.3 | 0.3 | ||
| Gain Error(Max)(%FSR) | 0.3 | 0.3 | |||||
| INL(Max), +/-LSB | 3 | 3 | 3 | 3 | 3 | ||
| INL(Max)(+/-LSB) | 3 | 3 | |||||
| Interface | Parallel | Parallel | Parallel | Parallel | Parallel | Parallel | Parallel |
| Internal Reference Drift(Max)(ppm/degC) | N/A | N/A | |||||
| Offset Error(Max), % | N/A | N/A | N/A | N/A | N/A | ||
| Offset Error(Max)(%) | N/A | N/A | |||||
| Operating Temperature Range, C | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | ||
| Operating Temperature Range(C) | -40 to 85 0 to 70 | -40 to 85 0 to 70 | |||||
| Output Range Max., mA/V | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | ||
| Output Range Max.(mA) | 5.1 | 5.1 | |||||
| Output Type | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage |
| Package Group | SOIC | SOIC | TSSOP | TSSOP | TSSOP | SOIC | TSSOP |
| Package Size: mm2:W x L, PKG | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | ||
| Package Size: mm2:W x L (PKG) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | |||||
| Power Consumption(Typ), mW | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | ||
| Power Consumption(Typ)(mW) | 2.7 | 2.7 | |||||
| Priority | 1 | 1 | |||||
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Reference: Type | Ext,Int | Ext,Int | Ext,Int | Ext Int | Ext Int | Ext,Int | Ext,Int |
| Resolution, Bits | 12 | 12 | 12 | 12 | 12 | ||
| Resolution(Bits) | 12 | 12 | |||||
| Sample / Update Rate, MSPS | 0.286 | 0.286 | 0.286 | 0.286 | 0.286 | ||
| Sample / Update Rate(MSPS) | 0.286 | 0.286 | |||||
| Settling Time, µs | 1 | 1 | 1 | 1 | 1 | ||
| Settling Time(Вµs) | 1 | 1 | |||||
| Special Features | N/A | N/A | N/A | N/A | N/A | N/A | N/A |
| Zero Code Error(Typ), mV | 20 | 20 | 20 | 20 | 20 | ||
| Zero Code Error(Typ)(mV) | 20 | 20 |
生态计划
| TLV5633CDW | TLV5633CDWG4 | TLV5633CPW | TLV5633CPWR | TLV5633CPWRG4 | TLV5633IDW | TLV5633IPW | |
|---|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Not Compliant | Not Compliant | Compliant | Compliant |
| Pb Free | No | No |
模型线
系列: TLV5633 (7)
制造商分类
- Semiconductors> Data Converters> Digital-to-Analog Converters (DACs)> Precision DACs (=<10MSPS)