Datasheet Linear Technology LTM9002-LA — 数据表
| 制造商 | Linear Technology |
| 系列 | LTM9002-LA |
14位125Msps双通道IF /基带接收器子系统
数据表
Datasheet LTM9002
PDF, 355 Kb, 语言: en, 文件上传: Aug 21, 2017, 页数: 28
14-Bit, 125Msps Dual-Channel IF/Baseband Receiver Subsystem
14-Bit, 125Msps Dual-Channel IF/Baseband Receiver Subsystem
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价格
打包
| LTM9002CV-LA#PBF | LTM9002IV-LA#PBF | |
|---|---|---|
| N | 1 | 2 |
| Package | 15mm × 11.25mm × 2.32mm LGA 包装外形图 | 15mm × 11.25mm × 2.32mm LGA 包装外形图 |
| Package Code | LGA | LGA |
| Package Index | 05-08-1757 | 05-08-1757 |
| Pin Count | 108 | 108 |
参数化
| Parameters / Models | LTM9002CV-LA#PBF | LTM9002IV-LA#PBF |
|---|---|---|
| ADC INL, LSB | 1.5 | 1.5 |
| ADCs | 2 | 2 |
| Architecture | Pipeline | Pipeline |
| Bits, bits | 12 | 12 |
| Number of Channels | 2 | 2 |
| DNL, LSB | 0.6 | 0.6 |
| Demo Boards | DC1298A-AA | DC1298A-AA |
| Export Control | no | no |
| Features | Clock Duty Cycle Stabilizer | Clock Duty Cycle Stabilizer |
| I/O | Parallel CMOS | Parallel CMOS |
| Input Drive | Differential, Single-Ended | Differential, Single-Ended |
| Input Span | 200mVpp (Ch.A), 800mVpp (Ch.B) | 200mVpp (Ch.A), 800mVpp (Ch.B) |
| Internal Reference | yes | yes |
| Latency | 5 | 5 |
| Operating Temperature Range, °C | 0 to 70 | -40 to 85 |
| Power, mW | 690 | 690 |
| SINAD, dB | 71 | 71 |
| SNR, dB | 69.9 | 69.9 |
| Simultaneous | no | no |
| Speed, ksps | 65000 | 65000 |
| Supply Voltage Range | 3V | 3V |
生态计划
| LTM9002CV-LA#PBF | LTM9002IV-LA#PBF | |
|---|---|---|
| RoHS | Compliant | Compliant |
其他选择
模型线
系列: LTM9002-LA (2)
制造商分类
- Data Conversion > Analog-to-Digital Converters (ADC) > High Speed ADCs (Fs >=10Msps)
- Data Conversion > Signal Chain µModule Receivers